ESP32-C3FN4 12,13 GPIO

AntBDokk
Posts: 3
Joined: Sat Oct 07, 2023 10:05 am

ESP32-C3FN4 12,13 GPIO

Postby AntBDokk » Sat Oct 07, 2023 10:17 am

Hi
For ECP32-C3 pins 12,13 are used as SPIHD and SPIWP (flash).
However, in some descriptions of the boards on this chip, and in some other places, I find mention that pins 12,13 can be used as standard user GPIOs if switched to DIO mode.
Does this correspond to the truth? I'm using Arduino, DIO mode. I tried using these pins as OUTPUT. But I don't get the result. Also tried to change the port parameters via MUX

Code: Select all

PIN_FUNC_SELECT(PERIPHS_IO_MUX_SPIHD_U, FUNC_SPIHD_GPIO12);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_SPIWP_U, FUNC_SPIWP_GPIO13);
I don't get the result.
Tell me, is it possible to use pins 12,13 GPIO for ESP32-C3FN4?
Thank you.

MicroController
Posts: 1707
Joined: Mon Oct 17, 2022 7:38 pm
Location: Europe, Germany

Re: ESP32-C3FN4 12,13 GPIO

Postby MicroController » Sun Oct 08, 2023 3:24 pm

According to the C3's datasheet:
For ESP32-C3FH4AZ, pins within the frame (namely pin 19 ∼ pin 24) are not bonded, and are labelled as ”not
connected”
These pins are the flash SPI and correspond to GPIO12-17.
So no, GPIO12-17 cannot be used on the ESP32-C3FN4 because they are not electrically connected to the physical pins of the chip.

AntBDokk
Posts: 3
Joined: Sat Oct 07, 2023 10:05 am

Re: ESP32-C3FN4 12,13 GPIO

Postby AntBDokk » Sun Oct 08, 2023 3:35 pm

MicroController wrote:
Sun Oct 08, 2023 3:24 pm
According to the C3's datasheet:
For ESP32-C3FH4AZ, pins within the frame (namely pin 19 ∼ pin 24) are not bonded, and are labelled as ”not
connected”
These pins are the flash SPI and correspond to GPIO12-17.
So no, GPIO12-17 cannot be used on the ESP32-C3FN4 because they are not electrically connected to the physical pins of the chip.
This applies to the C3FH4AZ version of the chip. For C3FH4 they are connected. This follows from the datasheet.

MicroController
Posts: 1707
Joined: Mon Oct 17, 2022 7:38 pm
Location: Europe, Germany

Re: ESP32-C3FN4 12,13 GPIO

Postby MicroController » Mon Oct 09, 2023 7:25 am

AntBDokk wrote:
Sun Oct 08, 2023 3:35 pm
This applies to the C3FH4AZ version of the chip. For C3FH4 they are connected. This follows from the datasheet.
You're right. Maybe someone will chime in who got it working.

ESP_Sprite
Posts: 9730
Joined: Thu Nov 26, 2015 4:08 am

Re: ESP32-C3FN4 12,13 GPIO

Postby ESP_Sprite » Mon Oct 09, 2023 2:36 pm

The pins are still connected to the flash, and putting random levels on these pins may still affect what the flash does.

AntBDokk
Posts: 3
Joined: Sat Oct 07, 2023 10:05 am

Re: ESP32-C3FN4 12,13 GPIO

Postby AntBDokk » Mon Oct 09, 2023 5:01 pm

ESP_Sprite wrote:
Mon Oct 09, 2023 2:36 pm
The pins are still connected to the flash, and putting random levels on these pins may still affect what the flash does.
I read on a Russian forum that for ESP8266 (in DIO mode) there is such a solution as to tell flash memory not to use WP, but to use a software WP. I.e. the memory will ignore the input signals. This instruction is given when loading the program, via SPI into the SRP1 and SP0 memory registers. I don't know if it's possible to do this for ESP 32 with internal memory. It is not known what kind of memory is installed in this ESP 32, I did not find the specification.

For SPIHD, there is also a solution for ESP8266 (in DIO mode), but it already requires the intervention of a pull-up resistor at this output, which is completely unsuitable for internal memory.

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