Connection of the embedded flash and how to disable VDD_SDIO

tl_fan
Posts: 5
Joined: Thu Jun 29, 2017 1:54 am

Connection of the embedded flash and how to disable VDD_SDIO

Postby tl_fan » Thu Jun 29, 2017 7:11 am

Hi,
The ESP32 datasheet says:
( ESP32-D2WD’s pins GPIO16, GPIO17, SD_CMD, SD_CLK, SD_DATA_0 and SD_DATA_1 are used for connecting the embedded flash, and are not recommended for other uses. )
In my project I want to add an external 1G-bit flash, and I plan to share the spi data bus pins with the embedded flash except for the CS# pin. Therefore, I wanna to know the corresponding connection of the embedded flash's SCLK, CS#, SI, SO, WP#, HOLD#.
And my another question is there an API to turn off VDD_SDIO in the SDK? If not, could anyone tell me how to disable VDD_SDIO to save power in deep sleep mode. Thanks!

ESP_Angus
Posts: 2344
Joined: Sun May 08, 2016 4:11 am

Re: Connection of the embedded flash and how to disable VDD_SDIO

Postby ESP_Angus » Thu Jun 29, 2017 7:50 am

tl_fan wrote:Hi,
The ESP32 datasheet says:
( ESP32-D2WD’s pins GPIO16, GPIO17, SD_CMD, SD_CLK, SD_DATA_0 and SD_DATA_1 are used for connecting the embedded flash, and are not recommended for other uses. )
In my project I want to add an external 1G-bit flash, and I plan to share the spi data bus pins with the embedded flash except for the CS# pin. Therefore, I wanna to know the corresponding connection of the embedded flash's SCLK, CS#, SI, SO, WP#, HOLD#.
On the ESP32-D2WD:
  • SCLK is GPIO 6
  • DO is GPIO 17
  • DI is GPIO 8
  • HOLD# is GPIO 11
  • WP# is GPIO 7
  • CS# is GPIO 16
Note that the above are GPIO numbers not pin numbers. (I've quoted you GPIO numbers not pin names because the pin names refer to the ESP32-D0WD functions and this gets confusing fast.)

Also note that SD_DATA_x pin numbering does not match the IOx pin numbering used on most SPI flash data sheets.

The same pin mapping data can be read from the chip via "espefuse.py summary".
tl_fan wrote: And my another question is there an API to turn off VDD_SDIO in the SDK? If not, could anyone tell me how to disable VDD_SDIO to save power in deep sleep mode. Thanks!
You can disable the VDD_SDIO regulator via efuse: https://github.com/espressif/esptool/wi ... e-vdd_sdio or it can be configured at runtime via some RTC registers.

However, in deep sleep mode the VDD_SDIO regulator is already powered down.

tl_fan
Posts: 5
Joined: Thu Jun 29, 2017 1:54 am

Re: Connection of the embedded flash and how to disable VDD_SDIO

Postby tl_fan » Thu Jun 29, 2017 8:11 am

Fine.
Thanks for your answer, ESP_Angus.

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