ESP32 Forum

Hello,
I have a question about the GPIO wake up in the ESP32-C6 chip.

I used to have a ESP32-C3, which uses esp_deep_sleep_enable_gpio_wakeup() to enable certain GPIOs to wake up deep sleep.

But after checking the ESP32-C6 manual, I found that GPIOs can only wake up light sleep. Is esp_deep_sleep_enable_gpio_wakeup() removed in C6?

ESP32-C6 sleep manual:
https://docs.espressif.com/projects/esp ... modes.html
ESP32-C3 sleep manual:
https://docs.espressif.com/projects/esp ... modes.html


Could anyone confirm this? Any suggestion would be greatly appreciated.

Not the answer you might be looking for, but I'm using esp_sleep_enable_ext1_wakeup() and that works fine on the C6.

ESP_Sprite wrote: ↑

Mon Mar 04, 2024 8:49 am

Not the answer you might be looking for, but I'm using esp_sleep_enable_ext1_wakeup() and that works fine on the C6.

Thanks but I still want to use GPIO to wake up DeepSleep.
I noticed that External Wakeup can be used to wake DeepSleep with RTC GPIO, but I didn't find any description on the web about which pin of the ESP32 C6 can be multiplexed as RTC GPIO.
Can you make a suggestion?
The code reference only describe the API, but not mentioned about physical pins:
https://docs.espressif.com/projects/esp ... /gpio.html

YeezB1601 wrote: ↑

Fri Mar 22, 2024 2:48 am

I noticed that External Wakeup can be used to wake DeepSleep with RTC GPIO, but I didn't find any description on the web about which pin of the ESP32 C6 can be multiplexed as RTC GPIO.
Can you make a suggestion?

See the datasheet, section 2.3.2. Long story short: GPIO0 to GPIO7 are RTC (LP) GPIOs.

Just an fyi here that maybe will keep someone else from wasting their time- the esp32-c6 ulp does not have access to the ADC peripheral.

Does anybody know what the LP Analog Peripheral is?

In the TRM there is the LP_ANA_PERI from Table 5-2, but that is not referenced anywhere else in the TRM.

also below that same table there is the note:

• LP CPU can access all peripherals listed in the table 5-2 except RISC-V Trace Encoder (TRACE), DEBUG ASSIST
(ASSIST_DEBUG) and Interrupt Priority Register (INTPRI).

Though presumably it is conditioned on the active power domains?

There is no ADC (analog) peripheral accessible by the LP-core on a ESP32-C6.

lbernstone wrote: ↑

Tue Apr 02, 2024 5:29 pm

There is no ADC (analog) peripheral accessible by the LP-core on a ESP32-C6.

That is technically incorrect: the ESP32-C6 can access all peripherals except the ones quoted because it has full access to the same bus as the main processor. I'll ask if there is a more 'native' way that also works in deep sleep; I agree that esp-idf and the documentation don't seem to mention one.

ESP_Sprite wrote: ↑

Wed Apr 03, 2024 2:27 am

That is technically incorrect: the ESP32-C6 can access all peripherals except the ones quoted because it has full access to the same bus as the main processor. I'll ask if there is a more 'native' way that also works in deep sleep; I agree that esp-idf and the documentation don't seem to mention one.

It would make me very happy if you are correct, but https://github.com/espressif/esp-idf/issues/13422