CP2102 not activated?

boudewijn
Posts: 1
Joined: Fri Nov 01, 2019 11:48 pm

CP2102 not activated?

Postby boudewijn » Sat Nov 02, 2019 12:07 am

Hi all,

I try to communicate with an ESP32 dev board via the on board CP2102 USB/UART.

Does that chip need to be initiated on the ESP32-side? Can it be that such a chip is not active?

I tried on two different Debian versions, on different PC's. The CP210x module is loaded, but no /dev/ttyUSBx is added when connecting the dev board. Nothing is added to lsusb.

When I connect power to USB and connect a serial/USB to RX and TX, I can see a couple of lines strolling by while booting. Is that short bit complete?

[Codebox]ets Jun 8 2016 00:22:57

rst:0x1 (POWERON_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0x00
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:2
load:0x3fff0008,len:8
load:0x3fff0010,len:3480
load:0x40078000,len:7804
ho 0 tail 12 room 4
load:0x40080000,len:252
entry 0x40080034
I (46) boot: ESP-IDF v2.0-3-gbef9896 2nd stage bootloader
I (47) boot: compile time 05:59:45
I (47) boot: Enabling RNG early entropy source...
I (66) boot: SPI Speed : 40MHz
I (78) boot: SPI Mode : DIO
I (91) boot: SPI Flash Size : 4MB
I (103) boot: Partition Table:
I (114) boot: ## Label Usage Type ST Offset Length
I (137) boot: 0 phy_init RF data 01 01 0000f000 00001000
I (160) boot: 1 otadata OTA data 01 00 00010000 00002000
I (183) boot: 2 nvs WiFi data 01 02 00012000 0000e000
I (207) boot: 3 at_customize unknown 40 00 00020000 000e0000
I (230) boot: 4 ota_0 OTA app 00 10 00100000 00180000
I (253) boot: 5 ota_1 OTA app 00 11 00280000 00180000
I (277) boot: End of partition table
I (290) boot: Disabling RNG early entropy source...
I (307) boot: Loading app partition at offset 00100000
I (1482) boot: segment 0: paddr=0x00100018 vaddr=0x00000000 size=0x0ffe8 ( 65512)
I (1483) boot: segment 1: paddr=0x00110008 vaddr=0x3f400010 size=0x1c5f0 (116208) map
I (1499) boot: segment 2: paddr=0x0012c600 vaddr=0x3ffb0000 size=0x0215c ( 8540) load
I (1529) boot: segment 3: paddr=0x0012e764 vaddr=0x40080000 size=0x00400 ( 1024) load
I (1553) boot: segment 4: paddr=0x0012eb6c vaddr=0x40080400 size=0x1b028 (110632) load
I (1631) boot: segment 5: paddr=0x00149b9c vaddr=0x400c0000 size=0x00034 ( 52) load
I (1633) boot: segment 6: paddr=0x00149bd8 vaddr=0x00000000 size=0x06430 ( 25648)
I (1649) boot: segment 7: paddr=0x00150010 vaddr=0x400d0018 size=0x7a56c (501100) map
I (1676) heap_alloc_caps: Initializing. RAM available for dynamic allocation:
I (1699) heap_alloc_caps: At 3FFBA6B8 len 00025948 (150 KiB): DRAM
I (1720) heap_alloc_caps: At 3FFE8000 len 00018000 (96 KiB): D/IRAM
I (1741) heap_alloc_caps: At 4009B428 len 00004BD8 (18 KiB): IRAM
I (1762) cpu_start: Pro cpu up.
I (1774) cpu_start: Single core mode
I (1787) cpu_start: Pro cpu start user code
I (1848) cpu_start: Starting scheduler on PRO CPU.
I (2034) uart: queue free spaces: 10

Bin version:0.10.0
I (2036) wifi: wifi firmware version: c604573
I (2036) wifi: config NVS flash: enabled
I (2037) wifi: config nano formating: disabled
I (2045) wifi: Init dynamic tx buffer num: 32
I (2046) wifi: wifi driver task: 3ffc4f34, prio:23, stack:3584
I (2051) wifi: Init static rx buffer num: 10
I (2055) wifi: Init dynamic rx buffer num: 0
I (2059) wifi: Init rx ampdu len mblock:7
I (2063) wifi: Init lldesc rx ampdu entry mblock:4
I (2067) wifi: wifi power manager task: 0x3ffca2dc prio: 21 stack: 2560
I (2074) wifi: wifi timer task: 3ffcb35c, prio:22, stack:3584
E (2079) phy_init: PHY data partition validated

I (2101) phy: phy_version: 329, Feb 22 2017, 15:58:07, 0, 0
I (2102) wifi: mode : softAP (24:6f:28:2b:46:61)
I (2105) wifi: mode : sta (24:6f:28:2b:46:60) + softAP (24:6f:28:2b:46:61)
I (2109) wifi: mode : softAP (24:6f:28:2b:46:61)
[/Codebox]


The ESP32 dev board is a bit in limbo between PC's:

PC1 (USB) <---- USB/serial --------> (rx/tx) ESP32 dev board (microUSB) <---------- USB -----------> (USB) PC2

The boot log above is on PC1, Debian Jessie, while the ESP32 is attached to USB on PC2 (Debian Buster).

Neither of the PC's display any activity when connecting the dev board on USB.

Needless to say, uploading any software via Arduino IDE has not worked yet either via USB. Should I be able to upload via the serial connection?

Thanks in advance for any pointer!

ESP_Dazz
Posts: 308
Joined: Fri Jun 02, 2017 6:50 am

Re: CP2102 not activated?

Postby ESP_Dazz » Mon Nov 04, 2019 9:55 am

boudewijn wrote: Does that chip need to be initiated on the ESP32-side? Can it be that such a chip is not active?
It shouldn't need to be activated. Which development board are you using? And is it a CP2102 or a CP2102N?

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