How to improve interrupt latency with Arduino/C

edigi32
Posts: 8
Joined: Fri Oct 05, 2018 6:49 am

How to improve interrupt latency with Arduino/C

Postby edigi32 » Tue Feb 26, 2019 9:57 am

After having issues with interrupt latency I've checked an older thread where it's described that interrupt latency with C is around 2us.
Is there a way (if possible code please) to improve it with some kind of in-line assembly (without RTOS change)? My ISR routines are very simple e.g. capturing PCNT value to some global variable, setting a flag etc. Thus the latency and the overhead is very high compared to the code.
Code examples what I'd like to improve:

Code: Select all

volatile uint32_t   refcovf = 0;
volatile uint32_t   sigcovf = 0;
void IRAM_ATTR pcnt_isr_fmeas(void * ovfp) {
  uint32_t     intr_status = PCNT.int_st.val;

  if (intr_status & PCNT0_INT) {
    PCNT.int_clr.val = PCNT0_INT;
    intr_status ^=  PCNT0_INT;
    if (PCNT.status_unit[0].h_lim_lat) {
      refcovf++;
    }
  }
  if (intr_status & PCNT1_INT) {
    PCNT.int_clr.val = PCNT1_INT;
    intr_status ^=  PCNT1_INT;
    if (PCNT.status_unit[1].h_lim_lat) {
      sigcovf++;
    }
  }
  // check channels not handled so far
  if (! intr_status ) return;
  for (int i = 2; i < PCNT_UNIT_MAX; i++) {
    if (intr_status & (BIT(i))) {
      PCNT.int_clr.val = BIT(i);
    }
  }
}// pcnt_isr_fmeas


volatile int16_t  signumcnt, gpsrefcnt;
volatile uint32_t signumovf, gpsrefovf, gpsnum=0;

void IRAM_ATTR isrsigrdy() {
  signumcnt = (REG_READ(PCNT_U1_CNT_REG)&0x7FFF);
  signumovf = sigcovf;
} // isrsigrdy

void IRAM_ATTR isrgpsrdy() {

  gpsrefcnt = (REG_READ(PCNT_U0_CNT_REG)&0x7FFF);
  gpsrefovf = refcovf;
  gpsnum=1;
} // isrgpsrdy
Thanks in advance.

ESP_igrr
Posts: 2071
Joined: Tue Dec 01, 2015 8:37 am

Re: How to improve interrupt latency with Arduino/C

Postby ESP_igrr » Tue Feb 26, 2019 10:07 am

Currently this is only possible using high level (level 5 or 6) interrupts: https://docs.espressif.com/projects/esp ... rupts.html. We are planning to do some optimizations to reduce the overhead for level 1-3 interrupts a bit, but there's no ETA yet for this.

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