hi eros,
have not seen your post here between the lines earliest - hope the "willing" is done here
you are welcome to follow the doings - hope they are helpfull for you:
erosnicolau wrote:
how memory do you get for saving files?
in this simple step, only one Flash and only one pSRAM so :
Flash side is 128Mbit, so there are 16Mbyte on Flash1 for saving files.
pSRAM side is 32Mbit, so there are 4Mbyte on pSRAM1 for pSRAM.
there are other further steps in the pipe and becomes public next time too.
no time frame -
when it is there it is there
erosnicolau wrote:
Also: what is the memory chip you used (manufacturer, part no.)?
i use this:
Winbond 25Q128FWSG 1.8V
ESP-PSRAM32, 1.8V
you can use other Flash and other pSRAM too
so feel free to compare datasheets from other manufacturer and seller
erosnicolau wrote:
The image sequences are pretty descriptive, but could you provide some more info on how you did it?
(connected what to what?
are there any config changes to be made on the firmware?)
you need devinitiv for this steps on
future/psram_malloc
until this is not gone in the master / release.
details are
here
the best is you start the pSRAM theme park
here
( edit: overlfly emotions postings from me there -Is nothing unusual - just the usual caused on my charactery )
erosnicolau wrote:
A more detailed guide would be great!
there are several description in the parts of pSRAM links how to connect.
the practial steps follow the base connectings and do only tricks for better mounting
( example solder pSRAM turn it upside down )
which step you missing in the time parts or which detail you missing, want see more?
the flash on the left has marked pin1, what is CE for the flash
then counterclockwise follows pin 2, 3, 4, 5, 6, 7, 8,
the pSRAM hast this pins too and on pic #5 you see the pin1 bent
on pic #4 you see the pSRAM normal, on pic #5 turn it upside down
the psram goes to this pins of Flash too
only pin1 CE goes then to IO16 and pin6 CLK goes then to IO17.
cause we can save place, we do here the trick to
turn it upside down the pSRAM and can connect
pins 2, 3, 4 directly to the flash 2, 3, 4
psram pin1 ( CE ) goes to IO16
pic #12
then the pins 5,7,8 of pSRAM
goes again exactly to the same pins of flash
only pin 6 CLK goes then to IO17
pic #11
cause /CE ( pi1) from pSRAM is pulled up to VCC_Vdd_SDIO_1.8V (not 3.3)
between pin1 CE from pSRAM and ideally the VCC pin 8 from pSRAM there is a 10k Ohm resistor
so you have 2 connect points on the pin1 CE pSRAM then -
- resistor left point
- IO16
and 2 connect points on the pin8 VCC pSRAM then
- resistor right point
- VCC_VDD_SDIO_1.8V
you see this detail on pic #15
nice shematic you see
here in this post
in final ( solder on a breakboard or adapter or anything,
one step you must do further: bootstrap MTDI pulled up cause 1.8 VDD_SDIO:
you must set the bootstrap pin MTDI ( IO12 ) pulled up
you can do this by efuses too but from here it is suggest
to do this by bootstrap pin.
other mod example DevKitC
there is Wroom32 mouned too, and you see the bootstrap connect then on the
DevKitC like this
erosnicolau wrote:
Thank you so much!
Eros
no problem, let us see here what you make
suggest you to read the datasheet for going familiary with pins, pins count, pins name, pins function and so on.
go the steps you see on the pic story.
i think this is a good routine and comes from practical doing by hand without microscope and other professional tools.
have phun
best wishes
rudi
last but not least:
if you plan to connect by pinheaders on the moduls and pSRAM on a breakout adapter
- nano32_pinheader_pSRAM.jpg (127.26 KiB) Viewed 9386 times
be sure your line are not to long because we have 40MHz on SPI
so if you wounder, why not all is running then, it can be the reason for it.
also note this then:
- better_view_over_all.png (28.82 KiB) Viewed 9386 times
if you plan MP on it
be sure your PCB design follows the High Speed rules
or you get noises and your mod is not run.
and eros, cause there is many time and efforts in this from espressif done here:
RTFM
