ESP32 Forum

Posted: **Sun Mar 10, 2019 1:39 pm**

Hi all.
I am using an esp32 (16MB) with SDK is 1.5
Uart 0 is configured for a debug port
Uart 1 is configured to communicate with a cellular modem on gpio 16/17

I am seeing some very odd effects where gpio 22/23 appear to be driven by the esp32 when uart 1 is in use.

gpio22/23 are control lines to the modem and are driven low by the application.

Here's an overview...

: Overview.PNG (61.92 KiB) Viewed 3595 times

Here are some of the io23 glitches in more detail.

: io23_detail.PNG (103.47 KiB) Viewed 3595 times

io22 behaviour is a little different - it sometimes seems to 'echo' the uart1 tx line(io16). It's almost as if this is cross-talk but it happens consistently regardless of the baud rate I am using.
Here are some of the io22 glitches in more detail.

: io22_detail.PNG (48.92 KiB) Viewed 3595 times

I did wonder whether the default RTS/CTS lines for uart0/1 are might be the cause of this so have tried to configure both uarts with flow-control disabled...

Code: Select all

 uart_config_t uart_config = {
        .baud_rate = 115200,
        .data_bits = UART_DATA_8_BITS,
        .parity = UART_PARITY_DISABLE,
        .stop_bits = UART_STOP_BITS_1,
        .flow_ctrl = UART_HW_FLOWCTRL_DISABLE,
        .rx_flow_ctrl_thresh = 122,
        .use_ref_tick = false};

    ESP_ERROR_CHECK(uart_param_config((uart_port_t)CONFIG_CONSOLE_UART_NUM, &uart_config));
    ESP_ERROR_CHECK(uart_set_pin((uart_port_t)CONFIG_CONSOLE_UART_NUM, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE,UART_PIN_NO_CHANGE));
    ESP_ERROR_CHECK(uart_driver_install((uart_port_t)CONFIG_CONSOLE_UART_NUM,
                                        256, 0, 0, NULL, 0));

    // Tell VFS to use UART driver
    esp_vfs_dev_uart_use_driver(CONFIG_CONSOLE_UART_NUM);

----

Code: Select all

	const uart_port_t uart_num = UART_NUM_1;
	
	uart_config_t uart_config = {
        .baud_rate = 921600,
        .data_bits = UART_DATA_8_BITS,
        .parity = UART_PARITY_DISABLE,
        .stop_bits = UART_STOP_BITS_1,
        .flow_ctrl = UART_HW_FLOWCTRL_DISABLE,
        .rx_flow_ctrl_thresh = 122,
        .use_ref_tick = false};

    ESP_ERROR_CHECK(uart_param_config(uart_num, &uart_config));

    // Set UART pins(TX: IO16 (UART2 default), RX: IO17 (UART2 default), RTS: IO18, CTS: IO19)
    ESP_ERROR_CHECK(uart_set_pin(uart_num, txPin, rxPin, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE));

    DEBUGLN("Using rx buf size of %d",UART_RX_BUFFER_SIZE);
    ESP_ERROR_CHECK(uart_driver_install(uart_num, UART_RX_BUFFER_SIZE, 0, 0, NULL, 0));

Both shallow and deep sleep modes are disabled during this operation since I noticed that some lines seem not to be driven during shallow sleep and the uart is unreliable.

Does anyone have any suggestions as to what might be going on here?

ESP32 Forum

Strange glitches on PIOs when uart1 is used

Strange glitches on PIOs when uart1 is used