Need info about Dual Core Bug 3.10
Posted: Wed Nov 15, 2017 6:17 pm
According to the ECO bug list document, bug 3.10 is a dual core issue.
Now my question is how are other people dealing with this issue and how are people dealing with this issue when using libraries? I assume that libraries aren't designed to avoid reading certain address space or include a lock to prevent it from doing so. This bug seems a little dangerous and sounds like we should run the MCU in single core mode until the bug is gone (eg: spurious/random runtime crash due to data access that we can't control from libraries).
When the dual-core CPU access
es different address spaces,
a random error occurs.
Description:
In the case of a dual-core CPU, when one CPU bus reads address space A (0x3FF0_0000
~ 0x3FF1_EFFF), while the other CPU bus reads address space B (0x3FF4_0000 ~
0x3FF7_FFFF), a random error will be generated on the CPU bus reading address space A.
Workarounds:
When one CPU bus reads address space A, prevent the other CPU bus from reading
address space B by implementing locks and interrupts.
Now my question is how are other people dealing with this issue and how are people dealing with this issue when using libraries? I assume that libraries aren't designed to avoid reading certain address space or include a lock to prevent it from doing so. This bug seems a little dangerous and sounds like we should run the MCU in single core mode until the bug is gone (eg: spurious/random runtime crash due to data access that we can't control from libraries).