Flashing over JTAG: OpenOcd Target not halted!
Posted: Fri Oct 21, 2022 1:43 pm
Hi there,
I’ve got a problem flashing via JTAG.
Problem description:
After a specific firmware is flashed (and working) the next attempt to flash the same or any other firmware over JTAG fails. If I try to flash the same Firmware over UART there is no problem. Also clearing the Flash over UART, and then flashing the Firmware over JTAG works.
I’ve noticed that when the OpenOcd log shows:
Here at this point the ESP32 restarts and starts executing Code. I can confirm this by the UART output of the running code.
After some time the Log continues
Yeah, the same as i already noticed -> ESP32 (Target) is not halted
The problem seems to be nearly the same as mentioned in:
https://github.com/espressif/openocd-esp32/issues/223
But I'm already using the newest OpenOcd version: v0.11.0-esp32-20220706 (2022-07-06-15:48)
The firmware doesn't use any of the JTAG or bootstrap GPIO pins. Flashing over JTAG worked for a long time, until adding some code to ping a server. I've encountered this problem once before (here it was mDns) and as a workaround commented code I don't need at the moment until i ran again in this error. It feels like a certain "amount" of code is triggering this error. Very strange.
System properties
Windows 10 64-bit;
VSCode+ PlatformIO -> Espressif 32 Platform (5.2.0)
Which is based on: IDF framework 4.4.2
OpenOcd v0.11.0-esp32-20220706 (2022-07-06-15:48)
Hardware
ESP-WROVER-KIT V4.1
(also tried a custom PCB including ESP32-WROOM-32E with Segger as JTAG tool)
OpenOcd log
Here is the full OpenOcd log including the command to start flashing:
Long version (-d3) is attached
Thanks!
Any help is appreciated
I’ve got a problem flashing via JTAG.
Problem description:
After a specific firmware is flashed (and working) the next attempt to flash the same or any other firmware over JTAG fails. If I try to flash the same Firmware over UART there is no problem. Also clearing the Flash over UART, and then flashing the Firmware over JTAG works.
I’ve noticed that when the OpenOcd log shows:
Code: Select all
** Programming Started **
Info : [esp32.cpu0] Debug controller was reset.
Info : [esp32.cpu0] Core was reset.
After some time the Log continues
Code: Select all
Error: Target not halted
Error: failed erasing sectors 16 to 301
embedded:startup.tcl:1184: Error: ** Programming Failed **
The problem seems to be nearly the same as mentioned in:
https://github.com/espressif/openocd-esp32/issues/223
But I'm already using the newest OpenOcd version: v0.11.0-esp32-20220706 (2022-07-06-15:48)
The firmware doesn't use any of the JTAG or bootstrap GPIO pins. Flashing over JTAG worked for a long time, until adding some code to ping a server. I've encountered this problem once before (here it was mDns) and as a workaround commented code I don't need at the moment until i ran again in this error. It feels like a certain "amount" of code is triggering this error. Very strange.
System properties
Windows 10 64-bit;
VSCode+ PlatformIO -> Espressif 32 Platform (5.2.0)
Which is based on: IDF framework 4.4.2
OpenOcd v0.11.0-esp32-20220706 (2022-07-06-15:48)
Hardware
ESP-WROVER-KIT V4.1
(also tried a custom PCB including ESP32-WROOM-32E with Segger as JTAG tool)
OpenOcd log
Here is the full OpenOcd log including the command to start flashing:
Code: Select all
openocd -d2 -f board/esp32-wrover-kit-3.3v.cfg -c "adapter speed 20000"
-c "program_esp {{C:\...\projectname\.pio\build\esp-wrover-kit\firmware.bin}} 0x10000 verify"
-c "program_esp {{C:\...\projectname\.pio\build\esp-wrover-kit\bootloader.bin}} 0x1000 verify"
-c "program_esp {{C:\...\projectname\.pio\build\esp-wrover-kit\partitions.bin}} 0x8000 verify"
-c "reset run; shutdown"
Code: Select all
Open On-Chip Debugger v0.11.0-esp32-20220706 (2022-07-06-15:48)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
debug_level: 2
adapter speed: 20000 kHz
Warn : Interface already configured, ignoring
adapter speed: 20000 kHz
Error: libusb_open() failed with LIBUSB_ERROR_NOT_SUPPORTED
Info : ftdi: if you experience problems at higher adapter clocks, try the command "ftdi tdo_sample_edge falling"
Info : clock speed 20000 kHz
Info : JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : starting gdb server for esp32.cpu0 on 3333
Info : Listening on port 3333 for gdb connections
Info : JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : [esp32.cpu0] requesting target halt and executing a soft reset
Info : [esp32.cpu0] Target halted, PC=0x4019D09E, debug_reason=00000000
Info : Set GDB target to 'esp32.cpu0'
Info : [esp32.cpu1] Target halted, PC=0x4019D09E, debug_reason=00000000
Info : [esp32.cpu0] Debug controller was reset.
Info : [esp32.cpu0] Core was reset.
Info : [esp32.cpu0] Target halted, PC=0x500000CF, debug_reason=00000000
Info : [esp32.cpu1] requesting target halt and executing a soft reset
Info : [esp32.cpu0] Core was reset.
Info : [esp32.cpu0] Target halted, PC=0x40000400, debug_reason=00000000
Info : [esp32.cpu1] Debug controller was reset.
Info : [esp32.cpu1] Core was reset.
Info : [esp32.cpu1] Target halted, PC=0x40000400, debug_reason=00000000
Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001
Info : Flash mapping 0: 0x10020 -> 0x3f400020, 168 KB
Info : Flash mapping 1: 0x40020 -> 0x400d0020, 832 KB
Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001
Info : Auto-detected flash bank 'esp32.cpu0.flash' size 4096 KB
Info : Using flash bank 'esp32.cpu0.flash' size 4096 KB
Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001
Info : Flash mapping 0: 0x10020 -> 0x3f400020, 168 KB
Info : Flash mapping 1: 0x40020 -> 0x400d0020, 832 KB
Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001
Info : Auto-detected flash bank 'esp32.cpu1.flash' size 4096 KB
Info : Using flash bank 'esp32.cpu1.flash' size 4096 KB
** Programming Started **
Info : [esp32.cpu0] Debug controller was reset.
Info : [esp32.cpu0] Core was reset.
Error: timed out while waiting for target halted
Info : [esp32.cpu0] Target halted, PC=0x4019D09E, debug_reason=00000000
Error: xtensa_wait_algorithm: not halted 0, pc 0x4019d09e, ps 0x60820
Error: Failed to wait algorithm (-302)!
Error: Algorithm run failed (-302)!
Info : [esp32.cpu1] Debug controller was reset.
Info : [esp32.cpu1] Core was reset.
Error: Target not halted
Error: failed erasing sectors 16 to 301
embedded:startup.tcl:1184: Error: ** Programming Failed **
in procedure 'program_esp'
in procedure 'program_error' called at file "C:/Users/username/.platformio/packages/tool-openocd-esp32/share/openocd/scripts/target/esp_common.cfg", line 171
at file "embedded:startup.tcl", line 1184
Thanks!
Any help is appreciated