Reset by TG1WD every 31 minutes

[ceslav]

ESP32S3 is reset by TG1WD every 31 minutes.

No timers used the code. Code runs without error prior the reset. Power to the unit stable.

CPU: ESP32­S3­WROOM­1U on a custom PCB.
esp-idf v5.2.1

monitor readout immediately after reset:

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ESP-ROM:esp32s3-20210327
Build:Mar 27 2021
rst:0x8 (TG1WDT_SYS_RST),boot:0x8 (SPI_FAST_FLASH_BOOT)
Saved PC:0x42002fdf
SPIWP:0xee
mode:DIO, clock div:2
load:0x3fce3810,len:0x178c
load:0x403c9700,len:0x4
load:0x403c9704,len:0xcbc
load:0x403cc700,len:0x2da0
entry 0x403c9914

Point of reset:

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0x42002fdf: panic_handler at /usr/local/esp/esp-idf/components/esp_system/port/panic_handler.c:154

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    // Need to reconfigure WDTs before we stall any other CPU
    esp_panic_handler_reconfigure_wdts(1000);

154 ->    esp_rom_delay_us(1);
    // Stall all other cores
    for (uint32_t i = 0; i < SOC_CPU_CORES_NUM; i++) {
        if (i != core_id) {
            esp_cpu_stall(i);
        }
    }
#endif // !CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE

vTaskList() printout before reset:
2147483647 is supposed to be -1

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Zelio1         	X	8	2147483647	1924	9
IDLE1          	R	0	1	1460	6
IDLE0          	R	0	0	1464	5
SVIN           	B	5	2147483647	6164	11
zeliouart      	B	6	2147483647	3052	8
gpsuart        	B	6	2147483647	2248	10
Tmr Svc        	B	1	0	1312	7
ipc0           	S	24	0	264	1
main           	B	1	0	1836	4
esp_timer      	S	22	0	3344	3
ipc1           	S	24	1	260	2

[ceslav]

This is not a ESP32 or ESP-IDF bug. Error found elsewhere.

Please close/remove