I am experiencing the same problem of quasi-randomly appearing zero samples..
I confirm this! The pattern of how(often) the corrupted (zero)data is transmitted is also connected to how close the configured esp32 slave sample-rate matches the stm32 master sample-rate. (Using STM32H750 / Daisy Seed board which operates effectively at 48014 Hz: if I set the esp32 i2s slave sample-rate to 48013 Hz the zero samples appear more frequent).
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The previously proposed solution would not work for my setup. I want to connect two esp32 i2s tx slaves connected to one stm32 rx master -> i therefore can't "clock the remote (STM32) master I2S interface from the I2S0_CLK signal of" two ESP32s....
like JB said:
Would love to understand if there is some solution/workaround to this problem....