I have a custom hardware with an ESP32D0WDQ6 (revision 1) and it has recently stopped waking from deep sleep. I am using ESP-IDF v3.1.3, and I am fairly confident that my hardware is not at fault since I have another board working just fine.
I flashed the deep sleep example from the ESP-IDF (https://github.com/espressif/esp-idf/bl ... ple_main.c) and here is the output:
Code: Select all
ets Jun 8 2016 00:22:57
rst:0x1 (POWERON_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:2
load:0x3fff0018,len:4
load:0x3fff001c,len:8184
load:0x40078000,len:10184
load:0x40080000,len:6448
entry 0x40080364
D (70) bootloader_flash: mmu set block paddr=0x00000000 (was 0xffffffff)[0m
[0;32mI (35) boot: ESP-IDF v3.1.3-dirty 2nd stage bootloader[0m
[0;32mI (35) boot: compile time 15:14:37[0m
[0;32mI (44) boot: Enabling RNG early entropy source...[0m
D (44) boot: magic e9[0m
D (44) boot: segments 04[0m
D (45) boot: spi_mode 02[0m
D (48) boot: spi_speed 00[0m
D (51) boot: spi_size 02[0m
[0;32mI (53) boot: SPI Speed : 40MHz[0m
[0;32mI (57) boot: SPI Mode : DIO[0m
[0;32mI (61) boot: SPI Flash Size : 4MB[0m
D (65) bootloader_flash: mmu set paddr=00000000 count=1 size=c00 src_addr=8000 src_addr_aligned=0[0m
D (74) boot: mapped partition table 0x8000 at 0x3f408000[0m
D (80) flash_parts: partition table verified, 4 entries[0m
[0;32mI (85) boot: Partition Table:[0m
[0;32mI (89) boot: ## Label Usage Type ST Offset Length[0m
D (96) boot: load partition table entry 0x3f408000[0m
D (101) boot: type=1 subtype=2[0m
[0;32mI (104) boot: 0 nvs WiFi data 01 02 00009000 00006000[0m
D (111) boot: load partition table entry 0x3f408020[0m
D (116) boot: type=1 subtype=1[0m
[0;32mI (119) boot: 1 phy_init RF data 01 01 0000f000 00001000[0m
D (127) boot: load partition table entry 0x3f408040[0m
D (132) boot: type=0 subtype=0[0m
[0;32mI (135) boot: 2 factory factory app 00 00 00010000 00100000[0m
[0;32mI (143) boot: End of partition table[0m
D (147) boot: Trying partition index -1 offs 0x10000 size 0x100000[0m
D (153) esp_image: reading image header @ 0x10000[0m
D (158) bootloader_flash: mmu set block paddr=0x00010000 (was 0xffffffff)[0m
D (165) esp_image: image header: 0xe9 0x08 0x02 0x01 400811c4[0m
V (171) esp_image: loading segment header 0 at offset 0x10018[0m
V (176) esp_image: segment data length 0x8a54 data starts 0x10020[0m
V (183) esp_image: segment 0 map_segment 1 segment_data_offs 0x10020 load_addr 0x3f400020[0m
[0;32mI (191) esp_image: segment 0: paddr=0x00010020 vaddr=0x3f400020 size=0x08a54 ( 35412) map[0m
D (200) bootloader_flash: mmu set paddr=00010000 count=1 size=8a54 src_addr=10020 src_addr_aligned=10000[0m
V (222) esp_image: loading segment header 1 at offset 0x18a74[0m
D (222) bootloader_flash: mmu set block paddr=0x00010000 (was 0xffffffff)[0m
V (224) esp_image: segment data length 0x22e4 data starts 0x18a7c[0m
V (230) esp_image: segment 1 map_segment 0 segment_data_offs 0x18a7c load_addr 0x3ffb0000[0m
[0;32mI (239) esp_image: segment 1: paddr=0x00018a7c vaddr=0x3ffb0000 size=0x022e4 ( 8932) load[0m
D (247) bootloader_flash: mmu set paddr=00010000 count=1 size=22e4 src_addr=18a7c src_addr_aligned=10000[0m
V (261) esp_image: loading segment header 2 at offset 0x1ad60[0m
D (263) bootloader_flash: mmu set block paddr=0x00010000 (was 0xffffffff)[0m
V (270) esp_image: segment data length 0x400 data starts 0x1ad68[0m
V (276) esp_image: segment 2 map_segment 0 segment_data_offs 0x1ad68 load_addr 0x40080000[0m
[0;32mI (284) esp_image: segment 2: paddr=0x0001ad68 vaddr=0x40080000 size=0x00400 ( 1024) load[0m
D (293) bootloader_flash: mmu set paddr=00010000 count=1 size=400 src_addr=1ad68 src_addr_aligned=10000[0m
V (303) esp_image: loading segment header 3 at offset 0x1b168[0m
D (308) bootloader_flash: mmu set block paddr=0x00010000 (was 0xffffffff)[0m
V (315) esp_image: segment data length 0x4ea0 data starts 0x1b170[0m
V (321) esp_image: segment 3 map_segment 0 segment_data_offs 0x1b170 load_addr 0x40080400[0m
[0;32mI (329) esp_image: segment 3: paddr=0x0001b170 vaddr=0x40080400 size=0x04ea0 ( 20128) load[0m
D (338) bootloader_flash: mmu set paddr=00010000 count=2 size=4ea0 src_addr=1b170 src_addr_aligned=10000[0m
V (356) esp_image: loading segment header 4 at offset 0x20010[0m
D (357) bootloader_flash: mmu set block paddr=0x00020000 (was 0xffffffff)[0m
V (361) esp_image: segment data length 0x13960 data starts 0x20018[0m
V (367) esp_image: segment 4 map_segment 1 segment_data_offs 0x20018 load_addr 0x400d0018[0m
[0;32mI (375) esp_image: segment 4: paddr=0x00020018 vaddr=0x400d0018 size=0x13960 ( 80224) map[0m
D (384) bootloader_flash: mmu set paddr=00020000 count=2 size=13960 src_addr=20018 src_addr_aligned=20000[0m
V (422) esp_image: loading segment header 5 at offset 0x33978[0m
D (422) bootloader_flash: mmu set block paddr=0x00030000 (was 0xffffffff)[0m
V (423) esp_image: segment data length 0x483c data starts 0x33980[0m
V (429) esp_image: segment 5 map_segment 0 segment_data_offs 0x33980 load_addr 0x400852a0[0m
[0;32mI (438) esp_image: segment 5: paddr=0x00033980 vaddr=0x400852a0 size=0x0483c ( 18492) load[0m
D (447) bootloader_flash: mmu set paddr=00030000 count=1 size=483c src_addr=33980 src_addr_aligned=30000[0m
V (464) esp_image: loading segment header 6 at offset 0x381bc[0m
D (464) bootloader_flash: mmu set block paddr=0x00030000 (was 0xffffffff)[0m
V (469) esp_image: segment data length 0x64 data starts 0x381c4[0m
V (475) esp_image: segment 6 map_segment 0 segment_data_offs 0x381c4 load_addr 0x400c0000[0m
[0;32mI (483) esp_image: segment 6: paddr=0x000381c4 vaddr=0x400c0000 size=0x00064 ( 100) load[0m
D (492) bootloader_flash: mmu set paddr=00030000 count=1 size=64 src_addr=381c4 src_addr_aligned=30000[0m
V (501) esp_image: loading segment header 7 at offset 0x38228[0m
D (507) bootloader_flash: mmu set block paddr=0x00030000 (was 0xffffffff)[0m
V (514) esp_image: segment data length 0x8 data starts 0x38230[0m
V (520) esp_image: segment 7 map_segment 0 segment_data_offs 0x38230 load_addr 0x50000200[0m
[0;32mI (528) esp_image: segment 7: paddr=0x00038230 vaddr=0x50000200 size=0x00008 ( 8) load[0m
D (537) bootloader_flash: mmu set paddr=00030000 count=1 size=8 src_addr=38230 src_addr_aligned=30000[0m
V (546) esp_image: image start 0x00010000 end of last section 0x00038238[0m
D (553) bootloader_flash: mmu set block paddr=0x00030000 (was 0xffffffff)[0m
D (560) esp_image: Calculated hash: e10065df[0m
D (564) bootloader_flash: mmu set paddr=00030000 count=1 size=20 src_addr=38240 src_addr_aligned=30000[0m
[0;32mI (580) boot: Loaded app from partition at offset 0x10000[0m
[0;32mI (580) boot: Disabling RNG early entropy source...[0m
D (585) boot: Mapping segment 0 as DROM[0m
D (589) boot: Mapping segment 4 as IROM[0m
D (593) boot: calling set_cache_and_start_app[0m
D (598) boot: configure drom and irom and start[0m
V (602) boot: d mmu set paddr=00010000 vaddr=3f400000 size=35412 n=1[0m
V (609) boot: rc=0[0m
V (611) boot: rc=0[0m
V (613) boot: i mmu set paddr=00020000 vaddr=400d0000 size=80224 n=2[0m
V (619) boot: rc=0[0m
V (621) boot: rc=0[0m
D (623) boot: start: 0x400811c4[0m
[0;32mI (627) cpu_start: Pro cpu up.[0m
[0;32mI (630) cpu_start: Starting app cpu, entry point is 0x40081178[0m
[0;32mI (0) cpu_start: App cpu up.[0m
[0;32mI (641) heap_init: Initializing. RAM available for dynamic allocation:[0m
[0;32mI (648) heap_init: At 3FFAE6E0 len 00001920 (6 KiB): DRAM[0m
[0;32mI (654) heap_init: At 3FFB3350 len 0002CCB0 (179 KiB): DRAM[0m
[0;32mI (660) heap_init: At 3FFE0440 len 00003BC0 (14 KiB): D/IRAM[0m
[0;32mI (666) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM[0m
[0;32mI (673) heap_init: At 40089ADC len 00016524 (89 KiB): IRAM[0m
[0;32mI (679) cpu_start: Pro cpu start user code[0m
[0;32mI (26) cpu_start: Starting scheduler on PRO CPU.[0m
[0;32mI (0) cpu_start: Starting scheduler on APP CPU.[0m
Not a deep sleep reset
Enabling timer wakeup, 20s
Enabling EXT1 wakeup on pins GPIO25, GPIO26
Touch pad #8 average reading is too low: 5 (expecting at least 300). Not using for deep sleep wakeup.
Touch pad #9 average reading is too low: 0 (expecting at least 300). Not using for deep sleep wakeup.
Enabling touch pad wakeup
Enabling ULP wakeup
Entering deep sleep
I would suppose this is related to hardware damage in the chip ? Is there any way to find out, to do a functional test ? Do you have any ideas ?