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`.dram0.bss' will not fit in region `dram0_0_seg', `dram0_0_seg' overflowed by 8608 bytes

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`.dram0.bss' will not fit in region `dram0_0_seg', `dram0_0_seg' overflowed by 8608 bytes

Posted: Wed Aug 08, 2018 4:24 pm
by vinodstanur
Hi,
I am facing a small issue with `dram0_0_seg' overflow while compiling.
I tried to modify the dram0 len as below

Code: Select all

 43   /* Shared data RAM, excluding memory reserved for ROM bss/data/stack.
 44 
 45      Enabling Bluetooth & Trace Memory features in menuconfig will decrease
 46      the amount of RAM available.
 47 
 48      Note: Length of this section *should* be 0x50000, and this extra DRAM is available
 49      in heap at runtime. However due to static ROM memory usage at this 176KB mark, the
 50      additional static memory temporarily cannot be used.
 51   */
 52   dram0_0_seg (RW) :                 org = 0x3FFB0000 + CONFIG_BT_RESERVE_DRAM ,
 53                                      len = 0x2c200 - CONFIG_BT_RESERVE_DRAM + [b]/*Added by me */ 0x4000 [/b]

By doing above modification in /esp-idf/components/esp32/ld/esp32.ld it compiled without error but while running I am getting continuous reset due to below error:

Code: Select all

[21:14:08:576] ets Jun  8 2016 00:22:57␍␊
[21:14:08:579] ␍␊
[21:14:08:579] rst:0x1 (POWERON_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)␍␊
[21:14:08:579] configsip: 0, SPIWP:0xee␍␊
[21:14:08:579] clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00␍␊
[21:14:08:579] mode:DIO, clock div:2␍␊
[21:14:08:579] load:0x3fff0018,len:4␍␊
[21:14:08:579] load:0x3fff001c,len:6380␍␊
[21:14:08:606] load:0x40078000,len:10460␍␊
[21:14:08:606] ho 0 tail 12 room 4␍␊
[21:14:08:606] load:0x40080400,len:6968␍␊
[21:14:08:606] entry 0x4008080c␍␊
[21:14:08:606] <0x1b>[0;32mI (30) boot: ESP-IDF v3.2-dev-362-g1c7a8b3b-dirty 2nd stage bootloader<0x1b>[0m␍␊
[21:14:08:606] <0x1b>[0;32mI (30) boot: compile time 20:24:19<0x1b>[0m␍␊
[21:14:08:606] <0x1b>[0;32mI (31) boot: Enabling RNG early entropy source...<0x1b>[0m␍␊
[21:14:08:643] <0x1b>[0;32mI (37) boot: SPI Speed      : 40MHz<0x1b>[0m␍␊
[21:14:08:643] <0x1b>[0;32mI (41) boot: SPI Mode       : DIO<0x1b>[0m␍␊
[21:14:08:643] <0x1b>[0;32mI (45) boot: SPI Flash Size : 4MB<0x1b>[0m␍␊
[21:14:08:643] <0x1b>[0;32mI (49) boot: Partition Table:<0x1b>[0m␍␊
[21:14:08:643] <0x1b>[0;32mI (52) boot: ## Label            Usage          Type ST Offset   Length<0x1b>[0m␍␊
[21:14:08:643] <0x1b>[0;32mI (60) boot:  0 nvs              WiFi data        01 02 00009000 00004000<0x1b>[0m␍␊
[21:14:08:643] <0x1b>[0;32mI (67) boot:  1 otadata          OTA data         01 00 0000d000 00002000<0x1b>[0m␍␊
[21:14:08:679] <0x1b>[0;32mI (75) boot:  2 phy_init         RF data          01 01 0000f000 00001000<0x1b>[0m␍␊
[21:14:08:679] <0x1b>[0;32mI (82) boot:  3 factory          factory app      00 00 00010000 00100000<0x1b>[0m␍␊
[21:14:08:679] <0x1b>[0;32mI (89) boot:  4 ota_0            OTA app          00 10 00110000 00200000<0x1b>[0m␍␊
[21:14:08:679] <0x1b>[0;32mI (97) boot:  5 ota_1            OTA app          00 11 00310000 00000010<0x1b>[0m␍␊
[21:14:08:679] <0x1b>[0;32mI (104) boot: End of partition table<0x1b>[0m␍␊
[21:14:08:712] <0x1b>[0;32mI (109) boot: Defaulting to factory image<0x1b>[0m␍␊
[21:14:08:712] <0x1b>[0;32mI (113) esp_image: segment 0: paddr=0x00010020 vaddr=0x3f400020 size=0x35f48 (221000) map<0x1b>[0m␍␊
[21:14:08:758] <0x1b>[0;32mI (200) esp_image: segment 1: paddr=0x00045f70 vaddr=0x3ffc0000 size=0x03364 ( 13156) load<0x1b>[0m␍␊
[21:14:08:771] <0x1b>[0;32mI (205) esp_image: segment 2: paddr=0x000492dc vaddr=0x3ffc3364 size=0x00000 (     0) load<0x1b>[0m␍␊
[21:14:08:802] <0x1b>[0;32mI (207) esp_image: segment 3: paddr=0x000492e4 vaddr=0x40080000 size=0x00400 (  1024) load<0x1b>[0m␍␊
[21:14:08:802] <0x1b>[0;32mI (216) esp_image: segment 4: paddr=0x000496ec vaddr=0x40080400 size=0x06924 ( 26916) load<0x1b>[0m␍␊
[21:14:08:802] <0x1b>[0;32mI (236) esp_image: segment 5: paddr=0x00050018 vaddr=0x400d0018 size=0x96f44 (618308) map<0x1b>[0m␍␊
[21:14:09:011] <0x1b>[0;32mI (452) esp_image: segment 6: paddr=0x000e6f64 vaddr=0x40086d24 size=0x0c304 ( 49924) load<0x1b>[0m␍␊
[21:14:09:057] <0x1b>[0;32mI (473) esp_image: segment 7: paddr=0x000f3270 vaddr=0x400c0000 size=0x00000 (     0) load<0x1b>[0m␍␊
[21:14:09:057] <0x1b>[0;32mI (474) esp_image: segment 8: paddr=0x000f3278 vaddr=0x50000000 size=0x00000 (     0) load<0x1b>[0m␍␊
[21:14:09:057] <0x1b>[0;32mI (491) boot: Loaded app from partition at offset 0x10000<0x1b>[0m␍␊
[21:14:09:105] <0x1b>[0;32mI (491) boot: Disabling RNG early entropy source...<0x1b>[0m␍␊
[21:14:09:105] <0x1b>[0;32mI (495) cpu_start: Pro cpu up.<0x1b>[0m␍␊
[21:14:09:105] <0x1b>[0;32mI (498) cpu_start: Starting app cpu, entry point is 0x400812bc<0x1b>[0m␍␊
[21:14:09:105] <0x1b>[0;32mI (0) cpu_start: App cpu up.<0x1b>[0m␍␊
[21:14:09:105] <0x1b>[0;32mI (508) heap_init: Initializing. RAM available for dynamic allocation:<0x1b>[0m␍␊
[21:14:09:105] <0x1b>[0;32mI (515) heap_init: At 3FFAFF10 len 000000F0 (0 KiB): DRAM<0x1b>[0m␍␊
[21:14:09:105] <0x1b>[0;32mI (521) heap_init: At 3FFDE3A0 len 00001C60 (7 KiB): DRAM<0x1b>[0m␍␊
[21:14:09:105] <0x1b>[0;32mI (527) heap_init: At 3FFE0440 len 00003BC0 (14 KiB): D/IRAM<0x1b>[0m␍␊
[21:14:09:175] <0x1b>[0;32mI (533) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM<0x1b>[0m␍␊
[21:14:09:175] <0x1b>[0;32mI (540) heap_init: At 40093028 len 0000CFD8 (51 KiB): IRAM<0x1b>[0m␍␊
[21:14:09:175] <0x1b>[0;32mI (546) cpu_start: Pro cpu start user code<0x1b>[0m␍␊
[21:14:09:175] assertion "res == pdTRUE" failed: file "/home/vinod/esp/esp-idf/components/esp32/ipc.c", line 86, function: esp_ipc_init␍␊
[21:14:09:175] abort() was called at PC 0x400d462b on core 0␍␊
[21:14:09:175] ␍␊
[21:14:09:175] Backtrace: 0x40090a88:0x3ffe3b50 0x40090c5f:0x3ffe3b70 0x400d462b:0x3ffe3b90 0x400d252d:0x3ffe3bc0 0x40081222:0x3ffe3c00 0x40081441:0x3ffe3c30 0x400790ab:0x3ffe3c50 0x4007915d:0x3ffe3c80 0x4007917b:0x3ffe3cc0 0x400794a1:0x3ffe3ce0 0x4008083e:0x3ffe3df0 0x40007c31:0x3ffe3eb0 0x4000073d:0x3ffe3f20␍␊
[21:14:09:247] ␍␊
[21:14:09:247] Rebooting...␍␊
[21:14:09:247] ets Jun  8 2016 00:22:57␍␊
A lot of free heap (130KB) is there so I increased the length of dram0_0_seg with 0x4000 to fit around additional 8K .bss by assuming that the dram0_0_seg is the cstack, but it is hitting me the runtime error of assertion "res == pdTRUE" failed: file "/home/vinod/esp/esp-idf/components/esp32/ipc.c", line 86

This is with bluetooth clasic. If I comment some part of my code, it works fine, so issue is with additional .bss which currently I can't help it, buy my question is if I have a lot of free heap, then why can't I compromise on heap with cstack ? How will I do that ?

Any clue?

Re: `.dram0.bss' will not fit in region `dram0_0_seg', `dram0_0_seg' overflowed by 8608 bytes

Posted: Wed Aug 08, 2018 7:19 pm
by WiFive
It is not contiguous so you are crashing through reserved sections

Re: `.dram0.bss' will not fit in region `dram0_0_seg', `dram0_0_seg' overflowed by 8608 bytes

Posted: Wed Aug 08, 2018 11:20 pm
by ESP_Angus
Because of some fixed RAM addresses used by the ESP32 ROM, there is a limit on the amount which can be statically allocated at compile time. Much more RAM is available at runtime via the heap (it is, as WiFive says, non-contiguous.)

There are some plans to work around this and allow more static allocation, but no ETA yet.

The best fix for the issue is to find a large statically allocated buffer in your program and change it to allocate dynamically (ie via malloc()).
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