ESP32 Forum

Hi,

my ESP32 board receives a Manchester encoded bitstream at a bit rate of 1 Mbit/s

Every burst is 128 bytes long and the voltage levels are: 0 Volt - 3.3 Volt

I'm focusing my attention on the I2S interface assisted by the DMA module.

I would like to sample the Manchester burst on a GPIO input pin at 8 Mbit/s, which is 8 times faster than the bitrate.
128 bytes will take 8 kbyte of samples.

Basically I would like to take a picture in RAM of the burst and then to do some post processing in order to reconstruct the signal.

I'm driven by this Intel paper:
https://www.intel.com/content/dam/www/p ... -paper.pdf


Can anybody give hints or suggestions?


Thanks,
Enrico Migliore

I have received a Manchester bitstream over a very long length of cable so there was significant attenuation and considerable waveform distortion. Due to cable capacitance, the incoming signal looked more like a triangular wave and the amplitude of each peak (positive or negative) depended somewhat on the sequence of one bit to the next. The incoming signal was passed to a voltage comparator integrated circuit with its threshold set to the mid voltage level (which would be 1.65V in your case). The digital output from the comparator was remarkably good, the timing of transitions was very close to the original transmitted signal (but delayed a little).

A specific start 'bit' was always sent at the start of the burst. Let's say it was always high followed by low. While waiting for a burst to start, the processor was therefore looking for a high to low transition while ignoring any low to high transition. It then waited another three-quarters of a bit period before reading the comparator's digital output. That gave the value of the first data bit. The processor then waited for the next transition (rising or falling) which would be the transition in the middle of the first data bit. The next reading was three-quarters of a bit period later, giving the value of the second data bit. This was repeated.

I expect this approach would work quite well in the presence of some noise but would not be good if noise is appreciable.

I do not understand why you are thinking of using I²S.

Dear Archibald,

>> I do not understand why you are thinking of using I²S.

I don't want the CPU busy in reading an decoding a bit at a time.

I want the hardware (I2S + DMA) to sample the pin and put the value into RAM.
Afterwards I will need the CPU intervention only for decoding the bit stream which was brought to RAM by the DMA.

The I2S + DMA are used in a VIDEO CAMERA frame capture example where 8 bits at a time are captured at a frequency of 7 MHz without the intervention of the CPU.

The big effort here is coding a C algorithm that doesn't insert bubbles in the pipeline of the CPU and that minimizes the number of RAM accesses. That's the reason why I'm calling for help here.

Enrico Migliore