External SPI flash error ESP_ERR_FLASH_NOT_INITIALISED on ESP32-S3 custom board
Posted: Mon Oct 21, 2024 4:17 pm
Dear forumers!
We are developing a custom board with ESP32-S3-WROOM-1U 16R8 module with an
additional external ESP-PSRAM64 and a Winbond 25Q128 SPI FLASH.
However in the first prototypes there is a problem with initialization of the external flash, we test it by running an ESP-IDF example https://github.com/espressif/esp-idf/tr ... lash_fatfs. So far we tried ESP-IDF 4.47 and 5.3.1 and the error occurs on both versions.
PSRAM and SPIFLASH are both connected on the SPI2 (host id = 1) bus to the following IO pins. The list also includes other used pins:
The external PSRAM works fine, it is initialized and added to the memory pool, although it must be set to run in octal mode(?) in the menuconfig. We also tried to disable it in the menuconfig.
What we tried:
- Disabling the external PSRAM in the menuconfig
- Changing both PSRAM & SPI FLASH frequencies from 20 to 80 MHz
- Disabling SPI FLASH DMA or setting it to AUTO
- Setting SPI FLASH CS ID from 0 to 3
- Setting various SPI speeds from SLOW to QIO
- This fix https://esp32.com/viewtopic.php?t=27631
EDIT:
The external flash can be successfuly programmed via esptool using the --spi-connection command.
We are developing a custom board with ESP32-S3-WROOM-1U 16R8 module with an
additional external ESP-PSRAM64 and a Winbond 25Q128 SPI FLASH.
However in the first prototypes there is a problem with initialization of the external flash, we test it by running an ESP-IDF example https://github.com/espressif/esp-idf/tr ... lash_fatfs. So far we tried ESP-IDF 4.47 and 5.3.1 and the error occurs on both versions.
Code: Select all
I (30) boot: ESP-IDF v5.4-dev-3602-ga97a7b0962-dirty 2nd stage bootloader
I (30) boot: compile time Oct 21 2024 17:26:27
I (30) boot: Multicore bootloader
I (32) boot: chip revision: v0.2
I (35) boot: efuse block revision: v1.3
I (39) boot.esp32s3: Boot SPI Speed : 40MHz
I (43) boot.esp32s3: SPI Mode : DIO
I (46) boot.esp32s3: SPI Flash Size : 16MB
I (50) boot: Enabling RNG early entropy source...
I (55) boot: Partition Table:
I (57) boot: ## Label Usage Type ST Offset Length
I (64) boot: 0 nvs WiFi data 01 02 00009000 00006000
I (70) boot: 1 phy_init RF data 01 01 0000f000 00001000
I (77) boot: 2 factory factory app 00 00 00010000 00100000
I (83) boot: End of partition table
I (86) esp_image: segment 0: paddr=00010020 vaddr=3c030020 size=0cd20h ( 52512) map
I (107) esp_image: segment 1: paddr=0001cd48 vaddr=3fc93e00 size=02f08h ( 12040) load
I (110) esp_image: segment 2: paddr=0001fc58 vaddr=40374000 size=003c0h ( 960) load
I (111) esp_image: segment 3: paddr=00020020 vaddr=42000020 size=28308h (164616) map
I (159) esp_image: segment 4: paddr=00048330 vaddr=403743c0 size=0f980h ( 63872) load
I (177) esp_image: segment 5: paddr=00057cb8 vaddr=600fe100 size=00018h ( 24) load
I (184) boot: Loaded app from partition at offset 0x10000
I (184) boot: Disabling RNG early entropy source...
I (195) octal_psram: vendor id : 0x0d (AP)
I (195) octal_psram: dev id : 0x02 (generation 3)
I (195) octal_psram: density : 0x03 (64 Mbit)
I (197) octal_psram: good-die : 0x01 (Pass)
I (202) octal_psram: Latency : 0x01 (Fixed)
I (206) octal_psram: VCC : 0x01 (3V)
I (210) octal_psram: SRF : 0x01 (Fast Refresh)
I (215) octal_psram: BurstType : 0x01 (Hybrid Wrap)
I (220) octal_psram: BurstLen : 0x01 (32 Byte)
I (224) octal_psram: Readlatency : 0x02 (10 cycles@Fixed)
I (230) octal_psram: DriveStrength: 0x00 (1/1)
I (234) esp_psram: Found 8MB PSRAM device
I (238) esp_psram: Speed: 40MHz
I (241) cpu_start: Multicore app
I (974) esp_psram: SPI SRAM memory test OK
I (984) cpu_start: Pro cpu start user code
I (984) cpu_start: cpu freq: 240000000 Hz
I (984) app_init: Application information:
I (984) app_init: Project name: ext_flash_fatfs
I (989) app_init: App version: v5.4-dev-3602-ga97a7b0962-dirty
I (995) app_init: Compile time: Oct 21 2024 17:26:23
I (1000) app_init: ELF file SHA256: d1eef487f...
I (1004) app_init: ESP-IDF: v5.4-dev-3602-ga97a7b0962-dirty
I (1010) efuse_init: Min chip rev: v0.0
I (1014) efuse_init: Max chip rev: v0.99
I (1018) efuse_init: Chip rev: v0.2
I (1022) heap_init: Initializing. RAM available for dynamic allocation:
I (1029) heap_init: At 3FC976B0 len 00052060 (328 KiB): RAM
I (1034) heap_init: At 3FCE9710 len 00005724 (21 KiB): RAM
I (1039) heap_init: At 3FCF0000 len 00008000 (32 KiB): DRAM
I (1044) heap_init: At 600FE118 len 00001ED0 (7 KiB): RTCRAM
I (1050) esp_psram: Adding pool of 8192K of PSRAM memory to heap allocator
I (1058) spi_flash: detected chip: gd
I (1060) spi_flash: flash io: dio
I (1063) sleep_gpio: Configure to isolate all GPIO pins in sleep state
I (1069) sleep_gpio: Enable automatic switching of GPIO sleep configuration
I (1076) main_task: Started on CPU0
I (1106) esp_psram: Reserving pool of 32K of internal memory for DMA/internal allocations
I (1106) main_task: Calling app_main()
I (1106) example: Initializing external SPI Flash
I (1106) example: Pin assignments:
I (1116) example: MOSI: 11 MISO: 13 SCLK: 12 CS: 8
I (1116) example: DMA CHANNEL: 0
E (1126) example: Failed to initialize external Flash: ESP_ERR_FLASH_NOT_INITIALISED (0x6003)
I (1126) main_task: Returned from app_main()
Code: Select all
PSRAM_CS(SPI2_CS0) IO10
FLASH_CS(SPI2_CS1) IO8
SPI2_CLK IO12
SPI2_SIO0 (SI) IO11
SPI2_SIO1 (SO) IO13
SPI2_SIO2 (WP) IO14
SPI2_SIO3 (HOLD) IO9
TX BG77 IO16
RX BG77 IO17
PWRKEY IO15
SW1 IO1
TX MSP430 IO6
RX MSP430 IO7
LED GREEN IO47
LED1 ORANGE IO48
TPM SDA IO39
TPM SCL IO40
MSP_EVENT IO5
MSP_PWRFAIL IO4
USB D- TP1 IO19
USB D+ TP4 IO20
What we tried:
- Disabling the external PSRAM in the menuconfig
- Changing both PSRAM & SPI FLASH frequencies from 20 to 80 MHz
- Disabling SPI FLASH DMA or setting it to AUTO
- Setting SPI FLASH CS ID from 0 to 3
- Setting various SPI speeds from SLOW to QIO
- This fix https://esp32.com/viewtopic.php?t=27631
EDIT:
The external flash can be successfuly programmed via esptool using the --spi-connection command.