ESP32 Forum

I need to determine when a SPI transaction has completed. The SPI is transferring single 8 bit message each transaction and doing it in polling mode. There is a SPI_TRANS_DONE interrupt and I am able to read its flag. The problem is that it triggers on the when the Chip Select gets activated, which is after initiating SPI_START and before the transaction actually occurs. The name SPI_TRANS_DONE would indicate that it would be triggered at the end of the transaction when the Chip Select is de-activate but that is not the case. The API doesn't check to see if the transaction has completed and simply waits for a loop timer to expire. Is there any mechanism to determine if the SPI transaction has actually complted?

Thanks

Do you happen to have code to replicate that?

Yes, Sorry but I don't know how to put it in one of those cool code windows. I use IO pin 10 to trigger the oscilloscope.

CmGpioDedicatedClr10(); // Set IO 10 low.
*SPI_Cmd_Reg_2 = SPI_CMD_REG_USR; // Start the SPI.
while(!((*SPI_Dma_Int_Raw_Reg_2) & SPI_DMA_INT_RAW_BIT_TRANS_DONE)){}; // Wait for Trans done to go high.
CmGpioDedicatedClr10(); // Set IO 10 high.

Do you clear the interrupt flag before starting a transaction?

Yes, forgot to post that. After the

*SPI_Cmd_Reg_2 = SPI_CMD_REG_USR; // Start the SPI.

it takes about 200ns before the interrupt flag gets set which is about 220 to 240ns before the transaction completes.

On which chip is this?

srjasz wrote: ↑

Mon Jun 10, 2024 8:11 pm

Yes, forgot to post that. After the

*SPI_Cmd_Reg_2 = SPI_CMD_REG_USR; // Start the SPI.

it takes about 200ns before the interrupt flag gets set which is about 220 to 240ns before the transaction completes.

Ok, so you cleared the interrupt by writing a 1 to its bit in the ...INT_RAW_REG or ...INT_CLR_REG? - And the pointers you're using (SPI_Cmd_Reg_2, SPI_Dma_Int_Raw_Reg_2) are all declared as pointers to volatile?

Correct, I wrote a 1 to the clear register.

Here are my pointer declarations.

volatile int32_t *SPI_Cmd_Reg_2 = (volatile int32_t *)0x60024000L;

volatile int32_t *SPI_Clock_Reg_2 = (volatile int32_t *)0x6002400CL;
volatile int32_t *SPI_User_Reg_2 = (volatile int32_t *)0x60024010L;
volatile int32_t *SPI_User1_Reg_2 = (volatile int32_t *)0x60024014L;
volatile int32_t *SPI_User2_Reg_2 = (volatile int32_t *)0x60024018L;
volatile int32_t *SPI_Ms_Dlen_Reg_2 = (volatile int32_t *)0x6002401CL;
volatile int32_t *SPI_Misc_Reg_2 = (volatile int32_t *)0x60024020L;
volatile int32_t *SPI_Dma_Int_Clr_Reg_2 = (volatile int32_t *)0x60024038L;
volatile int32_t *SPI_Dma_Int_Raw_Reg_2 = (volatile int32_t *)0x6002403CL;
volatile int32_t *SPI_Dma_Int_St_Reg_2 = (volatile int32_t *)0x60024040L;

Thanks for helping.

Looks all right to me. Haven't checked the addresses though.
We may have to look more deeply into the chip specifics, as @ESP_Sprite implied. So, which SoC are you using?

I would also specify
which spi mode is DMA or CPU ?
full duplex or half duplex ?