openthread/ot_br
Posted: Tue Jan 30, 2024 1:23 pm
Hello,
I am trying to run the code (esp-idf/examples/openthread
/ot_br/) on an ESP32S3 (Wroom) board. I believe configure everything right based on the Readme file.
This is the output I get when I do 'idf.py monitor'
I have also put the logic analyzer on the TX/RX pins (pins 4 and 5) and the only thing I see is the TX pin going to HI. No other traffic. Where should I look next?
Thanks
I am trying to run the code (esp-idf/examples/openthread
/ot_br/) on an ESP32S3 (Wroom) board. I believe configure everything right based on the Readme file.
This is the output I get when I do 'idf.py monitor'
ESP-ROM:esp32s3-20210327
Build:Mar 27 2021
rst:0x1 (POWERON),boot:0x2a (SPI_FAST_FLASH_BOOT)
SPIWP:0xee
mode:DIO, clock div:1
load:0x3fce3810,len:0x178c
load:0x403c9700,len:0x4
load:0x403c9704,len:0xc00
load:0x403cc700,len:0x2d74
entry 0x403c9900
I (27) boot: ESP-IDF v5.2-beta1-263-ge49823f10c 2nd stage bootloader
I (27) boot: compile time Jan 30 2024 07:49:28
I (28) boot: Multicore bootloader
I (32) boot: chip revision: v0.1
I (35) boot.esp32s3: Boot SPI Speed : 80MHz
I (40) boot.esp32s3: SPI Mode : DIO
I (45) boot.esp32s3: SPI Flash Size : 2MB
I (50) boot: Enabling RNG early entropy source...
I (55) boot: Partition Table:
I (59) boot: ## Label Usage Type ST Offset Length
I (66) boot: 0 nvs WiFi data 01 02 00009000 00006000
I (73) boot: 1 phy_init RF data 01 01 0000f000 00001000
I (81) boot: 2 factory factory app 00 00 00010000 001a9000
I (88) boot: End of partition table
I (93) esp_image: segment 0: paddr=00010020 vaddr=3c120020 size=50688h (329352) map
I (160) esp_image: segment 1: paddr=000606b0 vaddr=3fc99500 size=04cach ( 19628) load
I (164) esp_image: segment 2: paddr=00065364 vaddr=40374000 size=0acb4h ( 44212) load
I (176) esp_image: segment 3: paddr=00070020 vaddr=42000020 size=113e80h (1130112) map
I (379) esp_image: segment 4: paddr=00183ea8 vaddr=4037ecb4 size=0a764h ( 42852) load
I (397) boot: Loaded app from partition at offset 0x10000
I (397) boot: Disabling RNG early entropy source...
I (398) c
I have also put the logic analyzer on the TX/RX pins (pins 4 and 5) and the only thing I see is the TX pin going to HI. No other traffic. Where should I look next?
Thanks