Writing to SPI with a transaction length > internal memory available?
Posted: Sun Dec 24, 2023 5:06 am
Hello,
I'm flashing firmware to another chip using the ESP32. It must be done in a single transaction with the CS line held low for the entire length of the transfer. After some digging, it looks like the SPI driver can only transfer a single transaction that is smaller than the amount of heap in internal memory available. The firmware to be flashed is about 1MB and resides in SPIRAM.
Any tips on overcoming this limitation? I've tried to set the CS line low through GPIO, but the timing isn't typical of SPI and the (other) device doesn't accept the firmware.
Regards,
I'm flashing firmware to another chip using the ESP32. It must be done in a single transaction with the CS line held low for the entire length of the transfer. After some digging, it looks like the SPI driver can only transfer a single transaction that is smaller than the amount of heap in internal memory available. The firmware to be flashed is about 1MB and resides in SPIRAM.
Any tips on overcoming this limitation? I've tried to set the CS line low through GPIO, but the timing isn't typical of SPI and the (other) device doesn't accept the firmware.
Regards,