ESP32 Forum

Hello! I have problem with usins uart with standart baudratedifferent than 115200.
When I use default 115200 and than check by uart_get_baudrate(UART_NUM_0, &brd);, brd = 115201 (small difference),
but with 921600 -> uart_get_baudrate(UART_NUM_0, &brd);, brd = 922190 (huge difference).
I undarstand, it's because UART_CLK_FREQ = 80 MHz, but where I can to change it to use with standart uart baudrates?
Is there any API for this or I need change library file soc.h?


Sdk config: CPU freq = 240MHz
soc.h file:[Codebox]

//Periheral Clock {{
#define APB_CLK_FREQ_ROM ( 40*1000000 )
#define CPU_CLK_FREQ_ROM APB_CLK_FREQ_ROM
#define UART_CLK_FREQ_ROM ( 40*1000000)
#define EFUSE_CLK_FREQ_ROM ( 20*1000000)
#define CPU_CLK_FREQ APB_CLK_FREQ
#if CONFIG_IDF_ENV_FPGA
#define APB_CLK_FREQ ( 40*1000000 )
#else
#define APB_CLK_FREQ ( 80*1000000 )
#endif
#define REF_CLK_FREQ ( 1000000 )
#define RTC_CLK_FREQ (20*1000000)
#define XTAL_CLK_FREQ (40*1000000)
#define UART_CLK_FREQ APB_CLK_FREQ
#define WDT_CLK_FREQ APB_CLK_FREQ
#define TIMER_CLK_FREQ (80000000>>4) //80MHz divided by 16
#define SPI_CLK_DIV 4
#define TICKS_PER_US_ROM 40 // CPU is 80MHz
#define GPIO_MATRIX_DELAY_NS 0
//}}
[/Codebox]

If anyone is interested, I found a reason and problem was hardware. Esp32 (3.3V) connected to sim-module (1.8V) and level matching scheme (from sim-module datasheet) doesn't work with high baud rate. Sim-module understand all packets, esp32 doesn't understand packets. Actually with baud rate a little lower than 115200 and baud rate mistake more than +-0.02% and less than +-2% in this situation work unstable (sometimes esp32 accepts artifacts instead of data). With baud rate 57600 and less - no problems noticed

Thanks for posting the solution. Just curious - what level switching solution did you use that wasn't working at high speeds?

At first time it was like scheme (attached) and mounted 470pf_NM. After try to remove 470pf_NM -> better, but was data mistakes on 921600 baud rate and higher. Then both R on MCU_RXD =>1k. It stay stable on 921600, but form of signal is not very good ('0' level longer than '1' level, and rise front of '1' not not sharp).
May be will try chip for level matching later.

napster7c6 wrote: ↑

Wed Jun 21, 2023 6:24 am

At first time it was like scheme (attached)

Sorry, doesn't look like your attachment made it through...

Ah, clear, thanks.