ESP32 S3 LEDC and PWM dithering
Posted: Thu Apr 06, 2023 6:51 pm
It looks from the manual that the chip supports dithering using the lower 4 bits of the duty cycle, but I don’t seem to see support in the API for this. Am I missing it?
I'm referring to this section in the manual:
The [low-level code](https://github.com/espressif/esp-idf/bl ... #L283-L285) just ends up shifting left four bits, so access to those fractional bits at the bottom doesn't seem to be available.However, when B is nonzero, LEDC_CLK_DIV becomes a non-integer divisor. The clock divider implements non-integer frequency division by alternating between A and (A+1) LEDC_CLKx clock pulses per ref_pulsex clock pulse. This will result in the average frequency of ref_pulsex clock pulse being the desired frequency (i.e. the non-integer divided frequency).