ESP32 Forum

Code: Select all

esp_wifi_set_mode(WIFI_MODE_NULL);

Code: Select all

CONFIG_SPI_FLASH_BYPASS_BLOCK_ERASE=y
CONFIG_SPI_FLASH_YIELD_DURING_ERASE=y
CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS=5
CONFIG_SPI_FLASH_ERASE_YIELD_TICKS=100
CONFIG_SPI_FLASH_WRITE_CHUNK_SIZE=512

Code: Select all

typedef struct {
    app_func_arg_t common_arg; //shared args, must be the first item
    bool no_protect;    //to decide whether to check protected region (for the main chip) or not.
    uint32_t acquired_since_us;    // Time since last explicit yield()
    uint32_t released_since_us;    // Time since last end() (implicit yield)
    uint32_t acquired;             // Track the acquired/released state
} spi1_app_func_arg_t;
static portMUX_TYPE DRAM_ATTR yield_spinlock = portMUX_INITIALIZER_UNLOCKED;        // Spin lock to make accessing spi1 args threadsafe.

Code: Select all

static IRAM_ATTR esp_err_t spi1_flash_os_yield(void *arg, uint32_t* out_status)
{
    spi1_app_func_arg_t * ctx = (spi1_app_func_arg_t *)arg;
    if (likely(xTaskGetSchedulerState() == taskSCHEDULER_RUNNING)) {
#ifdef CONFIG_SPI_FLASH_ERASE_YIELD_TICKS
        do{
            int32_t delay;
            uint32_t time = esp_system_get_time();
            // Spin lock may not be required as reading U32 should be atomic.
            // Will get issues if not aligned correctly etc. I think
            portENTER_CRITICAL_ISR(&yield_spinlock);            
            delay = (time - ctx->released_since_us);
            portEXIT_CRITICAL_ISR(&yield_spinlock);
            
            // Work out the remaining delay time.
            delay = (CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS) - (delay/1000);
            // Limit it 
            if(delay > CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS){
                delay = CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS;
            }
            else if (delay <= 0){
                delay = 1;
            }
            vTaskDelay(delay * portTICK_PERIOD_MS);
        }while(on_spi1_check_yield(ctx));       // Check again to make sure another yield is not required.
#else
        vTaskDelay(1);
#endif
    }
    on_spi1_yielded(ctx);
    return ESP_OK;
}

Code: Select all

static inline IRAM_ATTR bool on_spi1_check_yield(spi1_app_func_arg_t* ctx)
{
#ifdef CONFIG_SPI_FLASH_YIELD_DURING_ERASE
    uint32_t time = esp_system_get_time();
    bool ret = true;

    portENTER_CRITICAL_ISR(&yield_spinlock);
    if(ctx->acquired){
        // SPI has been acquired by a task already for flash write/erase ops.       
        if ((time - ctx->acquired_since_us) >= (CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS * 1000)) {
            // Bus has been acquired for too long and it is time to release the bus.
            ctx->acquired = 0;                              
            ctx->released_since_us = time;
        }
    }
    else if ((time - ctx->released_since_us) >= (CONFIG_SPI_FLASH_ERASE_YIELD_TICKS * portTICK_PERIOD_MS * 1000)) {
        // SPI is available and enough time has passed to allow us to perform the next write/erase operation.
        ctx->acquired = 1;                  // Set acquired flag
        ctx->acquired_since_us = time;
        ret = false;                        // Don't need to yield. Bus will be acquired by caller.
    }
    portEXIT_CRITICAL_ISR(&yield_spinlock);
    return ret;
#else
    return false;
#endif

}
static inline IRAM_ATTR void on_spi1_released(spi1_app_func_arg_t* ctx)
{
#ifdef CONFIG_SPI_FLASH_YIELD_DURING_ERASE
    uint32_t time = esp_system_get_time();
    portENTER_CRITICAL_ISR(&yield_spinlock);
    if(ctx->acquired){
        // If the operation was a long operation but only called the yield function once It may still need a yield at the next operation.		
        if ((time - ctx->acquired_since_us) >= (CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS * 1000)) {
            // Bus is released now. The next task needs to know when this one finished.   
            // NOTE: Resetting this every time it is released will make all writes/erases,
            //	  even short ones, trigger a full yield.             
            ctx->released_since_us = time;
        }
        ctx->acquired = 0;
    }
    portEXIT_CRITICAL_ISR(&yield_spinlock);
#endif
}

static inline IRAM_ATTR void on_spi1_acquired(spi1_app_func_arg_t* ctx)
{
    // Ideally, when the time after `on_spi1_released()` before this function is called is larger
    // than CONFIG_SPI_FLASH_ERASE_YIELD_TICKS, the acquired time should be reset. We assume the
    // time after `on_spi1_check_yield()` before this function is so short that we can do the reset
    // in that function instead.
}

static inline IRAM_ATTR void on_spi1_yielded(spi1_app_func_arg_t* ctx)
{
    // Not needed anymore. on_spi1_check_yield() is now called from the spi1_flash_os_yield() function above.
}

Code: Select all

    esp_wifi_disconnect();
    esp_wifi_set_mode(WIFI_MODE_NULL);
    esp_wifi_stop();
   esp_wifi_deinit();

Code: Select all

esp_wifi_power_domain_off();

Code: Select all

/*
 * All the APIs declared here are internal only APIs, it can only be used by
 * espressif internal modules, such as SSC, LWIP, TCPIP adapter etc, espressif
 * customers are not recommended to use them.
 *
 * If someone really want to use specified APIs declared in here, please contact
 * espressif AE/developer to make sure you know the limitations or risk of
 * the API, otherwise you may get unexpected behavior!!!
 *
 */