Disabling of UART0 ROM boot messages not working
Posted: Sun Jan 01, 2023 8:01 pm
According to the technical datasheet for ESP32-s3 module I should be able to disable the UART0 ROM boot messages by changing a register value. The register has precedence over the eFuse (which is 0b00) and both of those have precedence over GPIO46 state.
I found code to set the bits here:
https://github.com/espressif/esp-idf/bl ... /rom/rtc.h
This doesn't seem to work. messages continue to be dumped over UART0 and USB after the command is executed.
This would be the perfect solution for me as I don't care about messages dumped on that port until I take control of the UART0 port.
Has anyone gotten this to work?
I found code to set the bits here:
https://github.com/espressif/esp-idf/bl ... /rom/rtc.h
Code: Select all
#define RTC_DISABLE_ROM_LOG ((1 << 0) | (1 << 16)) //!< Disable logging from the ROM code.
static inline void rtc_suppress_rom_log(void)
{
/* To disable logging in the ROM, only the least significant bit of the register is used,
* but since this register is also used to store the frequency of the main crystal (RTC_XTAL_FREQ_REG),
* you need to write to this register in the same format.
* Namely, the upper 16 bits and lower should be the same.
*/
REG_SET_BIT(RTC_CNTL_STORE4_REG, RTC_DISABLE_ROM_LOG);
}
This would be the perfect solution for me as I don't care about messages dumped on that port until I take control of the UART0 port.
Has anyone gotten this to work?