Using ULP on ESP32-S3 while main cores are awake.

[KT819GM]

Hello,

Sorry if the question sounds dumb enough but it would be helpful to get an answer as I couldn't find it through searches. I'm thinking that the ULP coprocessor is a separate hardware unit in the ESP32 series which is not dependent on main cores. If this is true then it could be used as a hardware watchdog while main cores are running (let's say to count ticks). Not sure if this is possible and worth an effort to try out.

Thank you!

[Leander]

Had the same idea before. You could use a share register and counter to check if the main cores are still running. But the ULP has no means to execute a reboot/reset. It can just exit it's running state back to the point the ULP started and the core task stopped.

[KT819GM]

T.y. Will try to figure it out with the ULP then. After wrong main core behavior, ULP could simply trigger one of the RTC GPIO which could be connected to the NPN or any MOSFET to pull down the reset pin making an effective hardware reset. Not sure though if it is worth using hardware on the same chip (does it makes any better than a watchdog except for being more configurable)?

Had the same idea before. You could use a share register and counter to check if the main cores are still running. But the ULP has no means to execute a reboot/reset. It can just exit it's running state back to the point the ULP started and the core task stopped.

[boarchuz]

You could use the RTC WDT to trigger a reset via the ULP... but then why not just use the RTC WDT?

[malachib]

Just for the record:

"Note that the ULP program keeps running and monitoring the input signal even when the SoC is woken up."

- https://github.com/espressif/esp-idf/tr ... lp_fsm/ulp