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ESP32-S3 deep sleep and USB/JTAG

Posted: Mon May 02, 2022 8:17 am
by oursland
I'm attempting to run the deep sleep example with the ESP32-S3 using the current `master` branch, sha `a82e6e63d98bb051d4c59cb3d440c537ab9f74b0`. I needed to enable the ULP coprocessor to get RTC memory to remain persistent upon wake-up. After doing so, the application behaved as expected when connected via UART.

What I've observed when connect to both the UART as the primary console out, and the USB/JTAG for the secondary console is that the ESP32-S3 will boot once and emit the expected output followed immediately by a second boot in which the RTC memory is cleared. Only the output of the second boot will occur on the USB/JTAG.

It seems that any attempt to use the USB/JTAG for serial, and possibly debugging, may result in the loss of RTC memory and the persistence of deep sleep.

Is this an issue that can be resolved or worked around?

Re: ESP32-S3 deep sleep and USB/JTAG

Posted: Tue May 03, 2022 1:37 am
by ESP_Sprite
Sounds like something is going wrong re-enabling the clock for the USB-serial-JTAG. Could you do us a favour and file a bug report for this? If you have some simple code that reproduces this, that would be helpful as well.

Re: ESP32-S3 deep sleep and USB/JTAG

Posted: Tue May 03, 2022 5:19 pm
by oursland
I have filed the issue https://github.com/espressif/esp-idf/issues/8889.

While investigating, if found the problem to be in the `monitor` program that resets the chip on connect. As the USB port is not persistent during deep sleep, the monitor resets the chip each time it reattaches.

My current workaround is to comment out the lines that reset the chip at startup, but a better solution would be a command line option to disable the reset on attach functionality.

Re: ESP32-S3 deep sleep and USB/JTAG

Posted: Wed May 04, 2022 12:59 am
by ESP_Sprite
Thanks for adding that, that saves us a trip down a deep hole trying to chase a red herring. Will see if the tools people can add that option.