The secure boot check is fail with no reason I can think of. Tried 3 boards and all end up in the same state. I've had this working before with no issue, so can't work out what i'm doing wrong now
Environment: DevKitC (ESP32-WROOM-32E), Modified version of ESP-AT firmware (based on V2.2.0.0), idf V4.2. Secure boot only (no encryption). Connected via the built in usb-uart chip
The fuses have already been programmed with generated command from build (see bottom for fuse table, and for generated commands), and the private key has never changed.
Steps:
1. erase_flash with esptool.py.
2. Build project with sdkconfig attached
3. Flash bootlooader with digest to 0x0. Terminal output:
Code: Select all
rst:0x3 (SW_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:2
load:0x3fff0040,len:100
load:0x3fff00a4,len:3764
load:0x40078000,len:28252
load:0x40080400,len:6328
Secure boot check failýets Jul 29 2019 12:21:46
What I don't understand is which part is failing. Is it the bootloader's signature, or the app's signature.
Any help would be greatly appreciated.
Many Thanks,
Conor
Generated bootloader commands:
Code: Select all
==============================================================================
Bootloader built and secure digest generated.
Secure boot enabled, so bootloader not flashed automatically.
Burn secure boot key to efuse using:
C:\Users\cs\.espressif\python_env\idf0.3_py3.8_env\Scripts\python.exe C:/Users/cs/repo/esp-at-tester/WiFi_Firmware/esp-idf/components/esptool_py/esptool/espefuse.py burn_key secure_boot_v1 C:/Users/cs/repo/esp-at-tester/WiFi_Firmware/build/bootloader/secure-bootloader-key-256.bin
First time flash command is:
C:\Users\cs\.espressif\python_env\idf0.3_py3.8_env\Scripts\python.exe C:/Users/cs/repo/esp-at-tester/WiFi_Firmware/esp-idf/components/esptool_py/esptool/esptool.py --chip esp32 --port=(PORT) --baud=(BAUD) --before=default_reset --after=no_reset write_flash --flash_mode dio --flash_freq 40m --flash_size 4MB 0x1000 C:/Users/cs/repo/esp-at-tester/WiFi_Firmware/build/bootloader/bootloader.bin
==============================================================================
To reflash the bootloader after initial flash:
C:\Users\cs\.espressif\python_env\idf0.3_py3.8_env\Scripts\python.exe C:/Users/cs/repo/esp-at-tester/WiFi_Firmware/esp-idf/components/esptool_py/esptool/esptool.py --chip esp32 --port=(PORT) --baud=(BAUD) --before=default_reset --after=no_reset write_flash --flash_mode dio --flash_freq 40m --flash_size 4MB 0x0 C:/Users/cs/repo/esp-at-tester/WiFi_Firmware/build/bootloader/bootloader-reflash-digest.bin
==============================================================================
Code: Select all
*******************************************************************************
# ESP-IDF Partition Table
# Name, Type, SubType, Offset, Size, Flags
phy_init,data,phy,0xe000,1K,
otadata,data,ota,0x10000,8K,
nvs,data,nvs,0x12000,56K,
at_customize,64,0,0x20000,896K,
ota_0,app,ota_0,0x100000,1536K,
ota_1,app,ota_1,0x280000,1536K,
*******************************************************************************
Code: Select all
Fuse table:
Detecting chip type... ESP32
espefuse.py v3.0
EFUSE_NAME (Block) Description = [Meaningful Value] [Readable/Writeable] (Hex Value)
----------------------------------------------------------------------------------------
Calibration fuses:
BLK3_PART_RESERVE (BLOCK0): BLOCK3 partially served for ADC calibration data = False R/W (0b0)
ADC_VREF (BLOCK0): Voltage reference calibration = 1114 R/W (0b00010)
Config fuses:
XPD_SDIO_FORCE (BLOCK0): Ignore MTDI pin (GPIO12) for VDD_SDIO on reset = False R/W (0b0)
XPD_SDIO_REG (BLOCK0): If XPD_SDIO_FORCE, enable VDD_SDIO reg on reset = False R/W (0b0)
XPD_SDIO_TIEH (BLOCK0): If XPD_SDIO_FORCE & XPD_SDIO_REG = 1.8V R/W (0b0)
CLK8M_FREQ (BLOCK0): 8MHz clock freq override = 50 R/W (0x32)
SPI_PAD_CONFIG_CLK (BLOCK0): Override SD_CLK pad (GPIO6/SPICLK) = 0 R/W (0b00000)
SPI_PAD_CONFIG_Q (BLOCK0): Override SD_DATA_0 pad (GPIO7/SPIQ) = 0 R/W (0b00000)
SPI_PAD_CONFIG_D (BLOCK0): Override SD_DATA_1 pad (GPIO8/SPID) = 0 R/W (0b00000)
SPI_PAD_CONFIG_HD (BLOCK0): Override SD_DATA_2 pad (GPIO9/SPIHD) = 0 R/W (0b00000)
SPI_PAD_CONFIG_CS0 (BLOCK0): Override SD_CMD pad (GPIO11/SPICS0) = 0 R/W (0b00000)
DISABLE_SDIO_HOST (BLOCK0): Disable SDIO host = False R/W (0b0)
Efuse fuses:
WR_DIS (BLOCK0): Efuse write disable mask = 256 R/W (0x0100)
RD_DIS (BLOCK0): Efuse read disable mask = 2 R/W (0x2)
CODING_SCHEME (BLOCK0): Efuse variable block length scheme
= NONE (BLK1-3 len=256 bits) R/W (0b00)
KEY_STATUS (BLOCK0): Usage of efuse block 3 (reserved) = False R/W (0b0)
Identity fuses:
MAC (BLOCK0): Factory MAC Address
= 44:17:93:5e:41:40 (CRC 0x7b OK) R/W
MAC_CRC (BLOCK0): CRC8 for factory MAC address = 123 R/W (0x7b)
CHIP_VER_REV1 (BLOCK0): Silicon Revision 1 = True R/W (0b1)
CHIP_VER_REV2 (BLOCK0): Silicon Revision 2 = True R/W (0b1)
CHIP_VERSION (BLOCK0): Reserved for future chip versions = 2 R/W (0b10)
CHIP_PACKAGE (BLOCK0): Chip package identifier = 1 R/W (0b001)
MAC_VERSION (BLOCK3): Version of the MAC field = 0 R/W (0x00)
Security fuses:
FLASH_CRYPT_CNT (BLOCK0): Flash encryption mode counter = 0 R/W (0b0000000)
UART_DOWNLOAD_DIS (BLOCK0): Disable UART download mode (ESP32 rev3 only) = False R/W (0b0)
FLASH_CRYPT_CONFIG (BLOCK0): Flash encryption config (key tweak bits) = 0 R/W (0x0)
CONSOLE_DEBUG_DISABLE (BLOCK0): Disable ROM BASIC interpreter fallback = True R/W (0b1)
ABS_DONE_0 (BLOCK0): Secure boot V1 is enabled for bootloader image = True R/W (0b1)
ABS_DONE_1 (BLOCK0): Secure boot V2 is enabled for bootloader image = False R/W (0b0)
JTAG_DISABLE (BLOCK0): Disable JTAG = False R/W (0b0)
DISABLE_DL_ENCRYPT (BLOCK0): Disable flash encryption in UART bootloader = False R/W (0b0)
DISABLE_DL_DECRYPT (BLOCK0): Disable flash decryption in UART bootloader = False R/W (0b0)
DISABLE_DL_CACHE (BLOCK0): Disable flash cache in UART bootloader = False R/W (0b0)
BLOCK1 (BLOCK1): Flash encryption key
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
BLOCK2 (BLOCK2): Secure boot key
= ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? -/-
BLOCK3 (BLOCK3): Variable Block 3
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
Flash voltage (VDD_SDIO) determined by GPIO12 on reset (High for 1.8V, Low/NC for 3.3V).