esp-idf V4 GPIO ISR triggers continuously
Posted: Thu Nov 12, 2020 2:01 pm
Hello,
We are using a WROVER module, silicon revision 1.
I have changed from esp-idf V3.1 to V4.0/V4.1 and have an issue I can't understand.
I'm using GPIO pins 35, 36, 39 and others, not used now, as digital interrupt inputs. Pins 36 and 39 are not setup for ADC use.
My problem is that the gpio_isr_handler keeps getting triggered by IO 36 and 39.
Hardware wise they both have pullup resistors and are negative edge triggered, GPIO_INTR_NEGEDGE.
When I run the V3.1 code on the same HW it works correctly.
I tried the peripherals gpio_example_main.c example, changed the IO's to 36 and 39 and it works correctly.
I'm using many of the peripherals, I2C, I2S, SDMMC, WiFi and UART.
What I have seen is that depending on the CPU load they trigger more or less.
I added the tick time to a struct that saves the IO and pin state and I see that the ISR triggers +- every 102ms on both IO 36 and 39 with no load but the delta changes once I start loading the system.
Does anybody perhaps know why the GPIO interrupts are getting triggered?
Regards,
Charles
We are using a WROVER module, silicon revision 1.
I have changed from esp-idf V3.1 to V4.0/V4.1 and have an issue I can't understand.
I'm using GPIO pins 35, 36, 39 and others, not used now, as digital interrupt inputs. Pins 36 and 39 are not setup for ADC use.
My problem is that the gpio_isr_handler keeps getting triggered by IO 36 and 39.
Hardware wise they both have pullup resistors and are negative edge triggered, GPIO_INTR_NEGEDGE.
When I run the V3.1 code on the same HW it works correctly.
I tried the peripherals gpio_example_main.c example, changed the IO's to 36 and 39 and it works correctly.
I'm using many of the peripherals, I2C, I2S, SDMMC, WiFi and UART.
What I have seen is that depending on the CPU load they trigger more or less.
I added the tick time to a struct that saves the IO and pin state and I see that the ISR triggers +- every 102ms on both IO 36 and 39 with no load but the delta changes once I start loading the system.
Does anybody perhaps know why the GPIO interrupts are getting triggered?
Regards,
Charles