ESP32 Forum

Posted: **Thu Dec 12, 2019 11:27 am**

Hi Guys,

I have NDIR_LAMP_TIMER set up with a 125ms period. This fires a GPIO.
I need to sample an ADC exactly 50ms after the NDIR_LAMP_TIMER ticks.

NDIR_LAMP_TIMER auto reloads
NDIR_SAMPLE_TIMER does not.

Currently I have the following ISR:

Code: Select all

void IRAM_ATTR timer_group0_isr(void *para)
{
    timer_intr_t timer_intr = timer_group_intr_get_in_isr(TIMER_GROUP_0);

    if (timer_intr & TIMER_INTR_T0) //lamp clock timer
    {
        timer_group_intr_clr_in_isr(TIMER_GROUP_0, NDIR_LAMP_TIMER); // clear interrupt flag
       
        if(lampLevel)
        {
            lampLevel = false;
            REG_WRITE(GPIO_OUT_W1TS_REG, (1 << NDIR_LAMP_GPIO)); // write lamp high
        }
        else
        {
            lampLevel = true;
            REG_WRITE(GPIO_OUT_W1TC_REG, (1 << NDIR_LAMP_GPIO)); // write lamp low
        }
        timer_set_counter_value(TIMER_GROUP_0, NDIR_SAMPLE_TIMER, 0x00000000ULL); // reload the sample timer
        timer_group_enable_alarm_in_isr(TIMER_GROUP_0, NDIR_LAMP_TIMER); // re enable the lamp alarm
        timer_group_enable_alarm_in_isr(TIMER_GROUP_0, NDIR_SAMPLE_TIMER); // re enable the sample alarm

    }
    else if(timer_intr & TIMER_INTR_T1) // lamp sample timer has hit its alarm, so we need to sample
    {
        timer_group_intr_clr_in_isr(TIMER_GROUP_0, NDIR_SAMPLE_TIMER); // clear interrupt flag

        //pass semaphore to main loop to fire off sensor sample
        xQueueSendFromISR(sample_queue, NULL, NULL);
    }
    
}

Currently, this all works as intended. However, occasionally during a flash read of some sort (spiffs or NVS) I get a Guru Meditation Error(Cache disabled but cached memory region accessed) related to what I belive is due to "timer_set_counter_value" not being ISR safe, or held in IRAM.

Whats the proper way to acheive what I am trying to do? There does not appear to be a "timer_set_counter_value_from_isr" function!

Thanks

ESP32 Forum

Starting / Setting TIMER_1 from TIMER_0 ISR

Starting / Setting TIMER_1 from TIMER_0 ISR