ESP32 Forum

SPI Master states that when using DMA the transfer buffers be 32-bit aligned (staring from a 32-bit boundary and having a length of multiples of 4 bytes). The section of the API is "Write and Read Phases".

My question is if my transfer buffer is a void *heap_caps_malloc(size_t size, uint32_t caps) where size is multiple of 4 bytes and caps is MALLOC_CAP_DMA) is the buffer address guaranteed by be on a 32 bit boundary?

If not what can one do to guarantee the buffer address is on a 32 bit boundary?

Hi enelson100,

All results of heap_caps_malloc() will be 32-bit aligned pointers. This is a C standard requirement (results of malloc must be suitably aligned for any variable which can be held in it, and we have 32-bit word size).

In the future the implementation could conceivably change so that malloc()-ing less than 4 bytes results in unaligned result (possible but unlikely), however as long as the size you're allocating is a multiple of 4 then the C standard should guarantee the result is a 32-bit aligned pointer.