ESP32 Forum

Hi,

What are the field "uint32_t clk_en: 1;" in file "i2s_struct.h" in esp-idf ?

On "esp32_technical_reference_manual_en", "Register 12.31: I2S_CLKM_CONF_REG (0x00ac)" on page 333, bit 20, don't exist, or better, is marked as reserved.

But i have seen this bit used like:

static i2s_dev_t I2S0;
I2S0.clkm_conf.clk_en = 0; // Disable i2s module clock ????
I2S0.clkm_conf.clk_en = 1; // Enable i2s module clock ????

Does this bit have the function to enable and disable the clock for the i2s module ?

Thank's.

no one ?

Sorry, I can not find any code in lastest idf that uses this bit.

Besides, this bit is reserved, please don't use it.

costaud wrote: ↑

Wed Oct 30, 2019 3:33 am

Sorry, I can not find any code in lastest idf that uses this bit.

Besides, this bit is reserved, please don't use it.

https://github.com/espressif/esp-iot-so ... lcd.c#L137

I think that line in lcd.c is probably redundant. The bit never gets cleared, from what I can see.

Baldhead, what are you aiming to achieve? To disable/enable the I2S peripheral overall you can use the peripheral enable/disable API in driver/periph_ctrl.h

Hi,

I just want to understand very well how i2s module works.
And using dma.

I want to write a static "lcd/parallel" "i2s esp32 intenal mudule" driver, i dont want to use dynamically allocated memory.
I don't even know if it works with static allocated memory. I think yes, but would freeRtos work ?

Either, i'm too dumb or the documentation is bad.
Not only the case of espressif manufacturer, but espressif documentation is worse than the competitors.

So ESP_Angus, i would like to know if this bit enable and disable only i2s module clock, and if so, should be well documented.
I would also like a better documentation.

I2S0.clkm_conf.clk_en = 0; // Disable i2s module clock ????
I2S0.clkm_conf.clk_en = 1; // Enable i2s module clock ????

Thank's.

Baldhead wrote: ↑

Thu Oct 31, 2019 6:06 pm

So ESP_Angus, i would like to know if this bit enable and disable only i2s module clock, and if so, should be well documented.
I would also like a better documentation.

I2S0.clkm_conf.clk_en = 0; // Disable i2s module clock ????
I2S0.clkm_conf.clk_en = 1; // Enable i2s module clock ????

Sorry for the confusion caused by this code.

This bit is reserved, and we recommend not changing it (it's set to 1 from reset). It's not used in the ESP-IDF driver, and I think the only other place it's used in current Espressif code is redundant (as the code just sets it to 1, and it's already set to 1). There might be some old test code floating around that uses it, but it's been removed from current code because it's not recommended to ever change this bit's value.

To enable/disable the I2S module clock, use the peripheral clock gating registers described in ESP32 Technical Reference Manual "5.3.7 Peripheral Clock Gating and Reset". If using ESP-IDF, the clock gating registers can be managed by the functions in driver/periph_ctrl.h to enable/disable the peripheral.

You can see these functions called from the ESP-IDF I2S driver initialization code, for example here:
https://github.com/espressif/esp-idf/bl ... i2s.c#L892

Baldhead wrote: ↑

Thu Oct 31, 2019 6:06 pm

I want to write a static "lcd/parallel" "i2s esp32 intenal mudule" driver, i dont want to use dynamically allocated memory.
I don't even know if it works with static allocated memory. I think yes, but would freeRtos work ?

Sorry, I don't fully understand the question. If you write the driver then you can choose how to allocate memory.

If you mean the ESP-IOT-SDK LCD driver, then there is only one large dynamic memory allocation:
https://github.com/espressif/esp-iot-so ... lcd.c#L115

You could replace this with assignment to a static buffer if you need to, and the same for the other smaller allocations in the driver.

If you want an entire firmware with no dynamically allocated memory at all, this is not supported in ESP-IDF. FreeRTOS and ESP-IDF both dynamically allocate memory at startup. If your app doesn't make further dynamic memory allocations then the overall app memory usage should be predictable, though.

In general, there are three restrictions to be mindful of when using static memory:

• In general, static buffers can't be placed in external PSRAM (although there's an option to put some .bss variables into PSRAM if
  marked with an attribute)
• Any buffer used for DMA has to be internal memory not PSRAM (see ESP32 TRM Chapter 6. DMA Controller for more about the DMA controller).
• There's a currently unresolved issue that the static DRAM limit of an app is 160KB, remaining DRAM has to be allocated from heap.

Also,

In example that WiFive mentioned:
"https://github.com/espressif/esp-iot-so ... lcd.c#L137"

and in "esp32_technical_reference_manual_en" page 313.
"The I2S_LCD_TX_SDX2_EN bit and the I2S_LCD_TX_WRX2_EN bit of register
I2S_CONF2_REG should be set to the LCD master transmitting mode, so that both the data bus and WR signal
work in the appropriate mode."

I didn't see these bits set. And the standard reset value of these bits are zero.

This depends on the exact LCD controller you're using. Starting from the TRM reference register descriptions:

I2S_LCD_TX_SDX2_EN Set this bit to duplicate data pairs (Data Frame, Form 2) in LCD mode. (R/W)
I2S_LCD_TX_WRX2_EN One datum will be written twice in LCD mode. (R/W)

In the "Form 1" example shown in the TRM (SDX2=0, WRX2=1), each data bit is being repeated for 2 clock cycles. (D0, D0, D1, D1, D2, D2, D3, D3, etc.)

In the "Form 2" example shown in the TRM (SDX2=1, WRX2=1), each data bit is also being transmitted for 2 clock cycles but every pair of data bits are repeated. (D0, D1, D0, D1, D2, D3, D2, D3 etc.)

In the default config, (SDX2=0, WRX2=0) there is the more typical one data bit per clock cycle. (D0, D1, D2, D3, etc). Agree that it would be clearer if this "Form" was also shown in the TRM for comparison.

My understanding is that the two LCD controllers (ILI9806 and NT35510) supported in the IoT Solution repo use a typical clocking scheme, so they don't need the more unusual modes to be enabled.