Another ULP timer question
Posted: Sat Sep 28, 2019 5:51 am
The ULP WAIT instruction appears to have no effect when the system is in deep sleep. With a 150 kHz timer clock giving a tick period of about 6.6 µS, "WAIT 1500000" should cause a delay of about 10 seconds. It doesn't. It seems to cause no delay at all. It assembles and builds with no error, but has no effect.
Does some register or bit not mentioned in the ULP instruction set "read the docs" write up or the tech reference have to be set or cleared somewhere in order for WAIT to work?
Also, if it did work, would this instruction cause the ULP to spin or should it put the ULP to sleep as if the "sleep n" instruction had been used.
Also, there's a curious note in the ULP instruction set write up for the "sleep" instruction".
"However, please note that SLEEP instruction issued (from ULP program) while the system is in deep sleep mode does not have effect, and sleep cycle count 0 is used."
It would appear that the only delay one can cause when going into deep sleep and starting the ULP is what is programmed into the SENS_ULP_CP_SLEEP_CYC0_REG register, since that is the delay invoked on ULP startup before any assembly code is executed, and it appears to be not possible to execute a "SLEEP n" for any "n" while in deep sleep ULP mode. I don't even see any effect from a 2nd "SLEEP 0" instruction. And the WAIT instruction appears not to work. Other than the first execution of SLEEP 0, no other delay seems possible, other than a jump-spin-count loop, when in deep sleep ULP mode. In case it's relevant, I'm doing these tests on chip revision 1.
Do I have this right, or am I missing something pretty elementary. And if I am, shouldn't something about that be mentioned in the ULP instruction set reference?
Forgive me if these are naive questions, but I haven't programmed in almost 30 years, and am still spinning up on the ESP32. I'm spending so much effort on ULP assembly language as I'm aiming for a very low power, long unattended battery life project. The only assembly languages I've used seriously are INS8080, Z80 and x86, all very well documented. Still I could tell you some stories about hardware bugs......
Does some register or bit not mentioned in the ULP instruction set "read the docs" write up or the tech reference have to be set or cleared somewhere in order for WAIT to work?
Also, if it did work, would this instruction cause the ULP to spin or should it put the ULP to sleep as if the "sleep n" instruction had been used.
Also, there's a curious note in the ULP instruction set write up for the "sleep" instruction".
"However, please note that SLEEP instruction issued (from ULP program) while the system is in deep sleep mode does not have effect, and sleep cycle count 0 is used."
It would appear that the only delay one can cause when going into deep sleep and starting the ULP is what is programmed into the SENS_ULP_CP_SLEEP_CYC0_REG register, since that is the delay invoked on ULP startup before any assembly code is executed, and it appears to be not possible to execute a "SLEEP n" for any "n" while in deep sleep ULP mode. I don't even see any effect from a 2nd "SLEEP 0" instruction. And the WAIT instruction appears not to work. Other than the first execution of SLEEP 0, no other delay seems possible, other than a jump-spin-count loop, when in deep sleep ULP mode. In case it's relevant, I'm doing these tests on chip revision 1.
Do I have this right, or am I missing something pretty elementary. And if I am, shouldn't something about that be mentioned in the ULP instruction set reference?
Forgive me if these are naive questions, but I haven't programmed in almost 30 years, and am still spinning up on the ESP32. I'm spending so much effort on ULP assembly language as I'm aiming for a very low power, long unattended battery life project. The only assembly languages I've used seriously are INS8080, Z80 and x86, all very well documented. Still I could tell you some stories about hardware bugs......