ESP32 Forum

I'm having a lot of trouble figuring out how to do what I want to do, which is bit-banging a clock out and data in to read an external device through GPIOs. This was fairly easy to get working on the CPU(s), but I also need to be able to do this from the ULP. Then, on meeting a trigger condition based on the data read during deep sleep, I need to wake the CPU, read again from the CPU. I need to be able to bit-bang the same GPIOs from both CPU and ULP. My requirements are is that I need to read and write a couple of GPIOs from both the CPU and ULP. Do I need to initialize those two GPIO’s from both the ULP and the CPU, or will initialization from the CPU make initializing from the ULP unnecessary? Firstly, are there any good example of reading and writing arbitrary GPIOs from the ULP? Do I have to init from both the CPU and ULP, or will initializing on the CPU make initializing from the ULP unnecessary? And if that, do I need to re-initialize with every switch between CPU and ULP. Are there any examples out there from which I can learn?

Lastly, is there a good dev environment that allows debugging the ULP?

Thanks for any help.

wevets

What is wrong with the examples in esp-iot-solution and why do you need 3 threads about this?

More examples: https://github.com/search?q=esp32+ulp

This is one of those things that will become a lot less daunting once you have a go and work through it.

I need to be able to bit-bang the same GPIOs from both CPU and ULP

Do you? Why not have the ULP continue reading the sensor even while the heavy lifters are awake? Easier, and potentially much more efficient (eg. if automatic light sleep is enabled).

Do I need to initialize those two GPIO’s from both the ULP and the CPU

One or the other. They do the same thing. You don't need to do it twice from different processors.

Lastly, is there a good dev environment that allows debugging the ULP?

The ESP32 itself. Have the SoC constantly polling memory that is being written to by the ULP, and print out anything significant (or at regular intervals). Or you could trigger an interrupt from the ULP at key stages, perhaps setting flags, and check memory contents from the SoC then. There's always the option to use LED indicators too. I'm sure a JTAG setup would let you have a browse through the RTC mem at runtime.