spiram and crashing nvs_flash_init()
Posted: Thu Jul 04, 2019 3:31 pm
I am using a ESP wroover and want to use the spiram.
When I enable the spiram in the menuconfig I get an exception when initializing the default nvs partition.
Log output:
To be sure it is the nvs_flash_init function is throwing the exception, I narrowed down the application to the following code:
I really have no idea on how to solve this problem, It must be a setting/configuration but which?
The spiram is regognised and seems to be ok.
Hope someone can give me the clue I need.
When I enable the spiram in the menuconfig I get an exception when initializing the default nvs partition.
Log output:
Code: Select all
I (30) boot: compile time 16:51:19
I (30) boot: Enabling RNG early entropy source...
I (35) boot: SPI Speed : 40MHz
I (39) boot: SPI Mode : DIO
I (43) boot: SPI Flash Size : 16MB
I (48) boot: Partition Table:
I (51) boot: ## Label Usage Type ST Offset Length
I (58) boot: 0 nvs WiFi data 01 02 00009000 00006000
I (66) boot: 1 otadata OTA data 01 00 0000f000 00002000
I (73) boot: 2 phy_init RF data 01 01 00011000 00001000
I (81) boot: 3 log WiFi data 01 02 00012000 00008000
I (88) boot: 4 ids WiFi data 01 02 0001a000 00002000
I (96) boot: 5 settings WiFi data 01 02 0001c000 00004000
I (103) boot: 6 factory factory app 00 00 00700000 00300000
I (111) boot: 7 ota_0 OTA app 00 10 00a00000 00300000
I (118) boot: 8 ota_1 OTA app 00 11 00d00000 00300000
I (126) boot: End of partition table
I (130) boot: Defaulting to factory image
I (135) esp_image: segment 0: paddr=0x00700020 vaddr=0x3f400020 size=0x0eb44 ( 60228) map
I (165) esp_image: segment 1: paddr=0x0070eb6c vaddr=0x3ffb0000 size=0x014a4 ( 5284) load
I (167) esp_image: segment 2: paddr=0x00710018 vaddr=0x400d0018 size=0x1cd3c (118076) map
0x400d0018: _flash_cache_start at ??:?
I (213) esp_image: segment 3: paddr=0x0072cd5c vaddr=0x3ffb14a4 size=0x00a30 ( 2608) load
I (214) esp_image: segment 4: paddr=0x0072d794 vaddr=0x40080000 size=0x00400 ( 1024) load
0x40080000: _WindowOverflow4 at C:/msys32/opt/esp-idf/components/freertos/xtensa_vectors.S:1779
I (220) esp_image: segment 5: paddr=0x0072db9c vaddr=0x40080400 size=0x0d0cc ( 53452) load
I (259) boot: Loaded app from partition at offset 0x700000
I (259) boot: Disabling RNG early entropy source...
I (261) spiram: Found 64MBit SPI RAM device
I (264) spiram: SPI RAM mode: flash 40m sram 40m
I (269) spiram: PSRAM initialized, cache is in low/high (2-core) mode.
I (276) cpu_start: Pro cpu up.
I (280) cpu_start: Starting app cpu, entry point is 0x40081164
0x40081164: call_start_cpu1 at C:/msys32/opt/esp-idf/components/esp32/cpu_start.c:246
I (0) cpu_start: App cpu up.
I (1171) spiram: SPI SRAM memory test OK
I (1172) heap_init: Initializing. RAM available for dynamic allocation:
I (1172) heap_init: At 3FFAE6E0 len 00001920 (6 KiB): DRAM
I (1178) heap_init: At 3FFB3088 len 0002CF78 (179 KiB): DRAM
I (1184) heap_init: At 3FFE0440 len 00003AE0 (14 KiB): D/IRAM
I (1191) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM
I (1197) heap_init: At 4008D4CC len 00012B34 (74 KiB): IRAM
I (1204) cpu_start: Pro cpu start user code
I (1209) spiram: Adding pool of 4096K of external SPI memory to heap allocator
I (112) cpu_start: Starting scheduler on PRO CPU.
I (0) cpu_start: Starting scheduler on APP CPU.
I (113) spiram: Reserving pool of 32K of internal memory for DMA/internal allocations
This is ESP32 chip with 2 CPU cores, WiFi/BT/BLE, silicon revision 1, 16MB external flash
GGuru Meditation Error: Core 1 panic'ed (IllegalInstruction). Exception was unhandled.
Memory dump at 0x400ec550: bad00bad bad00bad bad00bad
0x400ec550: __memcpy_aux at /home/jeroen/esp8266/esp32/newlib_xtensa-2.2.0-bin/newlib_xtensa-2.2.0/xtensa-esp32-elf/newlib/libc/machine/xtensa/../../../../.././newlib/libc/machine/xtensa/memcpy.S:138
Code: Select all
void app_main()
{
// Print chip information
esp_chip_info_t chip_info;
esp_chip_info(&chip_info);
printf("This is ESP32 chip with %d CPU cores, WiFi%s%s, ", chip_info.cores, (chip_info.features & CHIP_FEATURE_BT) ? "/BT" : "", (chip_info.features & CHIP_FEATURE_BLE) ? "/BLE" : "");
printf("silicon revision %d, ", chip_info.revision);
printf("%dMB %s flash\n", spi_flash_get_chip_size() / (1024 * 1024), (chip_info.features & CHIP_FEATURE_EMB_FLASH) ? "embedded" : "external");
// ESP_ERROR_CHECK( nvs_flash_init() );
}
The spiram is regognised and seems to be ok.
Hope someone can give me the clue I need.