[Answered] Core dump generation: Delay before UART output
Posted: Thu Feb 02, 2017 11:23 pm
As of the current ESP-IDF of this date, I see there is an option to delay core dump output writing to the UART for a period of milliseconds or until keyboard interaction from the UART. Would it be possible to hear the use case/user story behind this feature? I'm not seeing how this delay feature would be intended to be used.