OTA firmware update error
-
ESP_Sprite
- Posts: 9757
- Joined: Thu Nov 26, 2015 4:08 am
Re: OTA firmware update error
Not sure if it's the case, but does your ESP has octal flash? If so, you may need to enable that and burn a fuse.
Re: OTA firmware update error
Hi @ESP_Sprite,ESP_Sprite wrote: ↑Sun Jul 23, 2023 12:36 amNot sure if it's the case, but does your ESP has octal flash? If so, you may need to enable that and burn a fuse.
Yes, it is octal flash and it is enabled already.
Burn what in efuse ?
Could you explain step by step the process ?
Thank`s.
-
ESP_Sprite
- Posts: 9757
- Joined: Thu Nov 26, 2015 4:08 am
Re: OTA firmware update error
See https://docs.espressif.com/projects/esp ... onfig.html , error handling, point 2. It should be burned on most modules already, but I seem to recall that not having it burned can lead to weird issues, hence me asking.
Re: OTA firmware update error
@ESP_Sprite,
How to confirm if the flash memory is set in opi mode ?
I'm confused by this two configs:
CONFIG_ESPTOOLPY_FLASHMODE_OPI=y
CONFIG_ESPTOOLPY_FLASHMODE="dout"
And this:
"esptool.py image_info --version 2 build/wss_server.bin"
return Flash mode: DOUT
Another question:
SPI ram does not have a str/dtr option to set in sdkconfig.
Can you tell me if in octal mode, spiram is str or dtr ?
sdkconfig partial file:
How to confirm if the flash memory is set in opi mode ?
I'm confused by this two configs:
CONFIG_ESPTOOLPY_FLASHMODE_OPI=y
CONFIG_ESPTOOLPY_FLASHMODE="dout"
And this:
"esptool.py image_info --version 2 build/wss_server.bin"
return Flash mode: DOUT
Another question:
SPI ram does not have a str/dtr option to set in sdkconfig.
Can you tell me if in octal mode, spiram is str or dtr ?
sdkconfig partial file:
Code: Select all
#
# Serial flasher config
#
# CONFIG_ESPTOOLPY_NO_STUB is not set
CONFIG_ESPTOOLPY_OCT_FLASH=y
# CONFIG_ESPTOOLPY_FLASH_MODE_AUTO_DETECT is not set
CONFIG_ESPTOOLPY_FLASHMODE_OPI=y
# CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_STR is not set
CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_DTR=y
CONFIG_ESPTOOLPY_FLASHMODE="dout"
CONFIG_ESPTOOLPY_FLASHFREQ_80M=y
# CONFIG_ESPTOOLPY_FLASHFREQ_40M is not set
# CONFIG_ESPTOOLPY_FLASHFREQ_20M is not set
CONFIG_ESPTOOLPY_FLASHFREQ_80M_DEFAULT=y
CONFIG_ESPTOOLPY_FLASHFREQ="80m"
# CONFIG_ESPTOOLPY_FLASHSIZE_1MB is not set
# CONFIG_ESPTOOLPY_FLASHSIZE_2MB is not set
# CONFIG_ESPTOOLPY_FLASHSIZE_4MB is not set
# CONFIG_ESPTOOLPY_FLASHSIZE_8MB is not set
# CONFIG_ESPTOOLPY_FLASHSIZE_16MB is not set
CONFIG_ESPTOOLPY_FLASHSIZE_32MB=y
# CONFIG_ESPTOOLPY_FLASHSIZE_64MB is not set
# CONFIG_ESPTOOLPY_FLASHSIZE_128MB is not set
CONFIG_ESPTOOLPY_FLASHSIZE="32MB"
# CONFIG_ESPTOOLPY_HEADER_FLASHSIZE_UPDATE is not set
CONFIG_ESPTOOLPY_BEFORE_RESET=y
# CONFIG_ESPTOOLPY_BEFORE_NORESET is not set
CONFIG_ESPTOOLPY_BEFORE="default_reset"
CONFIG_ESPTOOLPY_AFTER_RESET=y
# CONFIG_ESPTOOLPY_AFTER_NORESET is not set
CONFIG_ESPTOOLPY_AFTER="hard_reset"
CONFIG_ESPTOOLPY_MONITOR_BAUD=115200
# end of Serial flasher config
-
ESP_Sprite
- Posts: 9757
- Joined: Thu Nov 26, 2015 4:08 am
Re: OTA firmware update error
You can use 'espefuse.py summary', then look for the FLASH_TYPE fuse. I think that number should be 1 for octal flash; if any, it should not be 0.
Octal PSRAM is always DDR, to my knowledge.
Octal PSRAM is always DDR, to my knowledge.
Re: OTA firmware update error
Hi @ESP_Sprite,ESP_Sprite wrote: ↑Mon Jul 24, 2023 4:59 amYou can use 'espefuse.py summary', then look for the FLASH_TYPE fuse. I think that number should be 1 for octal flash; if any, it should not be 0.
Octal PSRAM is always DDR, to my knowledge.
espefuse.py summary
Code: Select all
PS C:\esp32-Proj\WSS_SERVER_AND_UI_INTEGRATION_S3_12-12-2022> python C:\esp-idf\components\esptool_py\esptool\espefuse.py summary -p com11
espefuse.py v4.6.2
Connecting...
Failed to get PID of a device on com11, using standard reset sequence.
.
Detecting chip type... ESP32-S3
=== Run "summary" command ===
EFUSE_NAME (Block) Description = [Meaningful Value] [Readable/Writeable] (Hex Value)
----------------------------------------------------------------------------------------
Calibration fuses:
K_RTC_LDO (BLOCK1) BLOCK1 K_RTC_LDO = 28 R/W (0b0000111)
K_DIG_LDO (BLOCK1) BLOCK1 K_DIG_LDO = -4 R/W (0b1000001)
V_RTC_DBIAS20 (BLOCK1) BLOCK1 voltage of rtc dbias20 = 64 R/W (0x10)
V_DIG_DBIAS20 (BLOCK1) BLOCK1 voltage of digital dbias20 = -8 R/W (0x82)
DIG_DBIAS_HVT (BLOCK1) BLOCK1 digital dbias when hvt = -32 R/W (0b11000)
ADC2_CAL_VOL_ATTEN3 (BLOCK1) ADC2 calibration voltage at atten3 = 0 R/W (0b100000)
TEMP_CALIB (BLOCK2) Temperature calibration data = -0.5 R/W (0b100000101)
OCODE (BLOCK2) ADC OCode = 109 R/W (0x6d)
ADC1_INIT_CODE_ATTEN0 (BLOCK2) ADC1 init code at atten0 = -192 R/W (0xb0)
ADC1_INIT_CODE_ATTEN1 (BLOCK2) ADC1 init code at atten1 = 116 R/W (0b011101)
ADC1_INIT_CODE_ATTEN2 (BLOCK2) ADC1 init code at atten2 = 92 R/W (0b010111)
ADC1_INIT_CODE_ATTEN3 (BLOCK2) ADC1 init code at atten3 = 104 R/W (0b011010)
ADC2_INIT_CODE_ATTEN0 (BLOCK2) ADC2 init code at atten0 = -200 R/W (0xb2)
ADC2_INIT_CODE_ATTEN1 (BLOCK2) ADC2 init code at atten1 = 124 R/W (0b011111)
ADC2_INIT_CODE_ATTEN2 (BLOCK2) ADC2 init code at atten2 = 64 R/W (0b010000)
ADC2_INIT_CODE_ATTEN3 (BLOCK2) ADC2 init code at atten3 = 84 R/W (0b010101)
ADC1_CAL_VOL_ATTEN0 (BLOCK2) ADC1 calibration voltage at atten0 = 452 R/W (0x71)
ADC1_CAL_VOL_ATTEN1 (BLOCK2) ADC1 calibration voltage at atten1 = 504 R/W (0x7e)
ADC1_CAL_VOL_ATTEN2 (BLOCK2) ADC1 calibration voltage at atten2 = 408 R/W (0x66)
ADC1_CAL_VOL_ATTEN3 (BLOCK2) ADC1 calibration voltage at atten3 = 472 R/W (0x76)
ADC2_CAL_VOL_ATTEN0 (BLOCK2) ADC2 calibration voltage at atten0 = -20 R/W (0x85)
ADC2_CAL_VOL_ATTEN1 (BLOCK2) ADC2 calibration voltage at atten1 = -28 R/W (0b1000111)
ADC2_CAL_VOL_ATTEN2 (BLOCK2) ADC2 calibration voltage at atten2 = 252 R/W (0b0111111)
Config fuses:
WR_DIS (BLOCK0) Disable programming of individual eFuses = 0 R/W (0x00000000)
RD_DIS (BLOCK0) Disable reading from BlOCK4-10 = 0 R/W (0b0000000)
DIS_ICACHE (BLOCK0) Set this bit to disable Icache = False R/W (0b0)
DIS_DCACHE (BLOCK0) Set this bit to disable Dcache = False R/W (0b0)
DIS_TWAI (BLOCK0) Set this bit to disable CAN function = False R/W (0b0)
DIS_APP_CPU (BLOCK0) Disable app cpu = False R/W (0b0)
DIS_DIRECT_BOOT (BLOCK0) Disable direct boot mode = False R/W (0b0)
UART_PRINT_CONTROL (BLOCK0) Set the default UART boot message output mode = Enable R/W (0b00)
PIN_POWER_SELECTION (BLOCK0) Set default power supply for GPIO33-GPIO37; set wh = VDD_SPI R/W (0b1)
en SPI flash is initialized
BLOCK_USR_DATA (BLOCK3) User data
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
BLOCK_SYS_DATA2 (BLOCK10) System data part 2 (reserved)
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
Flash fuses:
FLASH_TPUW (BLOCK0) Configures flash waiting time after power-up; in u = 0 R/W (0x0)
nit of ms. If the value is less than 15; the waiti
ng time is the configurable value. Otherwise; the
waiting time is twice the configurable value
FLASH_ECC_MODE (BLOCK0) Flash ECC mode in ROM = 16to18 byte R/W (0b0)
FLASH_TYPE (BLOCK0) SPI flash type = 8 data lines R/W (0b1)
FLASH_PAGE_SIZE (BLOCK0) Set Flash page size = 0 R/W (0b00)
FLASH_ECC_EN (BLOCK0) Set 1 to enable ECC for flash boot = False R/W (0b0)
FORCE_SEND_RESUME (BLOCK0) Set this bit to force ROM code to send a resume co = False R/W (0b0)
mmand during SPI boot
Identity fuses:
DISABLE_WAFER_VERSION_MAJOR (BLOCK0) Disables check of wafer version major = False R/W (0b0)
DISABLE_BLK_VERSION_MAJOR (BLOCK0) Disables check of blk version major = False R/W (0b0)
WAFER_VERSION_MINOR_LO (BLOCK1) WAFER_VERSION_MINOR least significant bits = 1 R/W (0b001)
PKG_VERSION (BLOCK1) Package version = 0 R/W (0b000)
BLK_VERSION_MINOR (BLOCK1) BLK_VERSION_MINOR = 2 R/W (0b010)
WAFER_VERSION_MINOR_HI (BLOCK1) WAFER_VERSION_MINOR most significant bit = False R/W (0b0)
WAFER_VERSION_MAJOR (BLOCK1) WAFER_VERSION_MAJOR = 0 R/W (0b00)
OPTIONAL_UNIQUE_ID (BLOCK2) Optional unique 128-bit ID
= 2d a4 ed 15 85 7f 29 9b 1e 0e 82 6d 21 30 0d 0d R/W
BLK_VERSION_MAJOR (BLOCK2) BLK_VERSION_MAJOR of BLOCK2 = ADC calib V1 R/W (0b01)
WAFER_VERSION_MINOR (BLOCK0) calc WAFER VERSION MINOR = WAFER_VERSION_MINOR_HI = 1 R/W (0x1)
<< 3 + WAFER_VERSION_MINOR_LO (read only)
Jtag fuses:
SOFT_DIS_JTAG (BLOCK0) Set these bits to disable JTAG in the soft way (od = 0 R/W (0b000)
d number 1 means disable ). JTAG can be enabled in
HMAC module
DIS_PAD_JTAG (BLOCK0) Set this bit to disable JTAG in the hard way. JTAG = False R/W (0b0)
is disabled permanently
STRAP_JTAG_SEL (BLOCK0) Set this bit to enable selection between usb_to_jt = False R/W (0b0)
ag and pad_to_jtag through strapping gpio10 when b
oth reg_dis_usb_jtag and reg_dis_pad_jtag are equa
l to 0
Mac fuses:
MAC (BLOCK1) MAC address
= 7c:df:a1:e1:1d:84 (OK) R/W
CUSTOM_MAC (BLOCK3) Custom MAC
= 00:00:00:00:00:00 (OK) R/W
Security fuses:
DIS_DOWNLOAD_ICACHE (BLOCK0) Set this bit to disable Icache in download mode (b = False R/W (0b0)
oot_mode[3:0] is 0; 1; 2; 3; 6; 7)
DIS_DOWNLOAD_DCACHE (BLOCK0) Set this bit to disable Dcache in download mode ( = False R/W (0b0)
boot_mode[3:0] is 0; 1; 2; 3; 6; 7)
DIS_FORCE_DOWNLOAD (BLOCK0) Set this bit to disable the function that forces c = False R/W (0b0)
hip into download mode
DIS_DOWNLOAD_MANUAL_ENCRYPT (BLOCK0) Set this bit to disable flash encryption when in d = False R/W (0b0)
ownload boot modes
SPI_BOOT_CRYPT_CNT (BLOCK0) Enables flash encryption when 1 or 3 bits are set = Disable R/W (0b000)
and disabled otherwise
SECURE_BOOT_KEY_REVOKE0 (BLOCK0) Revoke 1st secure boot key = False R/W (0b0)
SECURE_BOOT_KEY_REVOKE1 (BLOCK0) Revoke 2nd secure boot key = False R/W (0b0)
SECURE_BOOT_KEY_REVOKE2 (BLOCK0) Revoke 3rd secure boot key = False R/W (0b0)
KEY_PURPOSE_0 (BLOCK0) Purpose of Key0 = USER R/W (0x0)
KEY_PURPOSE_1 (BLOCK0) Purpose of Key1 = USER R/W (0x0)
KEY_PURPOSE_2 (BLOCK0) Purpose of Key2 = USER R/W (0x0)
KEY_PURPOSE_3 (BLOCK0) Purpose of Key3 = USER R/W (0x0)
KEY_PURPOSE_4 (BLOCK0) Purpose of Key4 = USER R/W (0x0)
KEY_PURPOSE_5 (BLOCK0) Purpose of Key5 = USER R/W (0x0)
SECURE_BOOT_EN (BLOCK0) Set this bit to enable secure boot = False R/W (0b0)
SECURE_BOOT_AGGRESSIVE_REVOKE (BLOCK0) Set this bit to enable revoking aggressive secure = False R/W (0b0)
boot
DIS_DOWNLOAD_MODE (BLOCK0) Set this bit to disable download mode (boot_mode[3 = False R/W (0b0)
:0] = 0; 1; 2; 3; 6; 7)
ENABLE_SECURITY_DOWNLOAD (BLOCK0) Set this bit to enable secure UART download mode = False R/W (0b0)
SECURE_VERSION (BLOCK0) Secure version (used by ESP-IDF anti-rollback feat = 0 R/W (0x0000)
ure)
BLOCK_KEY0 (BLOCK4)
Purpose: USER
Key0 or user data
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
BLOCK_KEY1 (BLOCK5)
Purpose: USER
Key1 or user data
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
BLOCK_KEY2 (BLOCK6)
Purpose: USER
Key2 or user data
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
BLOCK_KEY3 (BLOCK7)
Purpose: USER
Key3 or user data
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
BLOCK_KEY4 (BLOCK8)
Purpose: USER
Key4 or user data
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
BLOCK_KEY5 (BLOCK9)
Purpose: USER
Key5 or user data
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
Spi Pad fuses:
SPI_PAD_CONFIG_CLK (BLOCK1) SPI_PAD_configure CLK = 0 R/W (0b000000)
SPI_PAD_CONFIG_Q (BLOCK1) SPI_PAD_configure Q(D1) = 0 R/W (0b000000)
SPI_PAD_CONFIG_D (BLOCK1) SPI_PAD_configure D(D0) = 0 R/W (0b000000)
SPI_PAD_CONFIG_CS (BLOCK1) SPI_PAD_configure CS = 0 R/W (0b000000)
SPI_PAD_CONFIG_HD (BLOCK1) SPI_PAD_configure HD(D3) = 0 R/W (0b000000)
SPI_PAD_CONFIG_WP (BLOCK1) SPI_PAD_configure WP(D2) = 0 R/W (0b000000)
SPI_PAD_CONFIG_DQS (BLOCK1) SPI_PAD_configure DQS = 0 R/W (0b000000)
SPI_PAD_CONFIG_D4 (BLOCK1) SPI_PAD_configure D4 = 0 R/W (0b000000)
SPI_PAD_CONFIG_D5 (BLOCK1) SPI_PAD_configure D5 = 0 R/W (0b000000)
SPI_PAD_CONFIG_D6 (BLOCK1) SPI_PAD_configure D6 = 0 R/W (0b000000)
SPI_PAD_CONFIG_D7 (BLOCK1) SPI_PAD_configure D7 = 0 R/W (0b000000)
Usb fuses:
DIS_USB_OTG (BLOCK0) Set this bit to disable USB function = False R/W (0b0)
USB_EXCHG_PINS (BLOCK0) Set this bit to exchange USB D+ and D- pins = False R/W (0b0)
USB_EXT_PHY_ENABLE (BLOCK0) Set this bit to enable external PHY = False R/W (0b0)
DIS_USB_JTAG (BLOCK0) Set this bit to disable function of usb switch to = False R/W (0b0)
jtag in module of usb device
DIS_USB_SERIAL_JTAG (BLOCK0) Set this bit to disable usb device = False R/W (0b0)
USB_PHY_SEL (BLOCK0) This bit is used to switch internal PHY and extern
= internal PHY is assigned to USB Device while external PHY is assigned to USB OTG R/W (0b0)
al PHY for USB OTG and USB Device
DIS_USB_SERIAL_JTAG_ROM_PRINT (BLOCK0) USB printing = Enable R/W (0b0)
DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE (BLOCK0) Set this bit to disable UART download mode through = False R/W (0b0)
USB
DIS_USB_OTG_DOWNLOAD_MODE (BLOCK0) Set this bit to disable download through USB-OTG = True R/W (0b1)
Vdd fuses:
VDD_SPI_XPD (BLOCK0) SPI regulator power up signal = True R/W (0b1)
VDD_SPI_TIEH (BLOCK0) If VDD_SPI_FORCE is 1; determines VDD_SPI voltage
= VDD_SPI connects to 1.8 V LDO R/W (0b0)
VDD_SPI_FORCE (BLOCK0) Set this bit and force to use the configuration of = True R/W (0b1)
eFuse to configure VDD_SPI
Wdt fuses:
WDT_DELAY_SEL (BLOCK0) RTC watchdog timeout threshold; in unit of slow cl = 40000 R/W (0b00)
ock cycle
Flash voltage (VDD_SPI) set to 1.8V by efuse.
esptool.py flash_id
Code: Select all
PS C:\esp32-Proj\WSS_SERVER_AND_UI_INTEGRATION_S3_12-12-2022> python C:\esp-idf\components\esptool_py\esptool\esptool.py -p com11 flash_id
esptool.py v4.6.2
Serial port com11
Connecting...
Failed to get PID of a device on com11, using standard reset sequence.
.
Detecting chip type... ESP32-S3
Chip is ESP32-S3 (revision v0.1)
Features: WiFi, BLE
Crystal is 40MHz
MAC: 7c:df:a1:e1:1d:84
Uploading stub...
Running stub...
Stub running...
Manufacturer: c2
Device: 8039
Detected flash size: 32MB
Flash type set in eFuse: octal (8 data lines)
Hard resetting via RTS pin...
Manufacturer: c2
Device: 8039
I didn't find device 8039 in this file: https://github.com/flashrom/flashrom/bl ... ashchips.h
https://docs.espressif.com/projects/esp ... mands.html
#define MACRONIX_ID 0xC2 /* Macronix (MX) */
Last edited by Baldhead on Tue Jul 25, 2023 1:26 am, edited 1 time in total.
-
ESP_Sprite
- Posts: 9757
- Joined: Thu Nov 26, 2015 4:08 am
Re: OTA firmware update error
No, that looks good.
Another question: what ESP-IDF version are you using? Does the issue go away if you upgrade to the current master?
Another question: what ESP-IDF version are you using? Does the issue go away if you upgrade to the current master?
Re: OTA firmware update error
I am using last stable version, v5.1.ESP_Sprite wrote: ↑Tue Jul 25, 2023 12:53 amNo, that looks good.
Another question: what ESP-IDF version are you using? Does the issue go away if you upgrade to the current master?
I didnt have tested with master.
For me it's complicated to keep changing esp-idf. I erase everything (esp-idf folder and .espressif folder to install a new version).
Notes:
esp-idf v5.1
Chip: ESP32-S3R8V
Chip revision: v0.1
ESP-ROM:esp32s3-20210327 Build:Mar 27 2021
Dev board: ESP32-S3-DevKitC-1-N32R8V
Module: ESP32-S3-WROOM-2-N32R8V
Re: OTA firmware update error
I deleted the sdkconfig file and configured manually.
Had no effect.
I tested with esp-idf v5.1 again.
* With partition addresses below 16MB it works.
* With ota_0 partition address below 16MB and ota_1 partition address above 16MB it doesn't work.
I think this problem is a bug in esp-idf.
Had no effect.
I tested with esp-idf v5.1 again.
* With partition addresses below 16MB it works.
* With ota_0 partition address below 16MB and ota_1 partition address above 16MB it doesn't work.
I think this problem is a bug in esp-idf.
Re: OTA firmware update error
@ESP_Sprite,Baldhead wrote: ↑Tue Jul 25, 2023 2:00 amI deleted the sdkconfig file and configured manually.
Had no effect.
I tested with esp-idf v5.1 again.
* With partition addresses below 16MB it works.
* With ota_0 partition address below 16MB and ota_1 partition address above 16MB it doesn't work.
I think this problem is a bug in esp-idf.
Could you confirm it for me ?
Who is online
Users browsing this forum: Bing [Bot], Google [Bot] and 331 guests