Recently started using the ESP32 DevKitC and could successfully communicate in SPI. However, recently I've encountered a few problems with transmitting a simple value via SPI.
At the moment my implementation consists of a header (hal.h) and source (hal.c) file. The hal.c file has an initialisation function for setting up the SPI communication. The following code is the initialisation of the SPI master and device.
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esp_err_t ret;
spi_bus_config_t buscfg;
buscfg.miso_io_num = SPI_MISO;
buscfg.mosi_io_num = SPI_MOSI;
buscfg.sclk_io_num = SPI_CLK;
buscfg.quadwp_io_num = -1;
buscfg.quadhd_io_num = -1;
spi_device_interface_config_t devcfg;
devcfg.clock_speed_hz = 10000000;
devcfg.mode = 1;
devcfg.spics_io_num = SPI_CS;
devcfg.queue_size = 7;
devcfg.flags |= SPI_DEVICE_HALFDUPLEX;
ret = spi_bus_initialize(HSPI_HOST, &buscfg, 1);
assert(ret==ESP_OK);
ret = spi_bus_add_device(HSPI_HOST, &devcfg, &spi_handle);
assert(ret==ESP_OK);
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Guru Meditation Error of type InstrFetchProhibited occurred on core 0. Exception was unhandled.
Register dump:
PC : 0x000001e6 PS : 0x00060031 A0 : 0x40081380 A1 : 0x3ffb07e0
0x40081380: _xt_lowint1 at xtensa_vectors.o:?
A2 : 0x3ffb43cc A3 : 0x000001e6 A4 : 0xfa0000c0 A5 : 0x3ff64000
A6 : 0x00000001 A7 : 0x00000004 A8 : 0x80082f60 A9 : 0xfa0000c0
A10 : 0x3ffb40e8 A11 : 0x08000000 A12 : 0xf20000c0 A13 : 0x00000040
A14 : 0xe00000c0 A15 : 0x00007003 SAR : 0x0000001f EXCCAUSE: 0x00000014
EXCVADDR: 0x000001e4 LBEG : 0x4000c2e0 LEND : 0x4000c2f6 LCOUNT : 0xffffffff
In driver/spi_master.c the following happens:
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esp_err_t spi_device_queue_trans(spi_device_handle_t handle, spi_transaction_t *trans_desc, TickType_t ticks_to_wait)
{
BaseType_t r;
SPI_CHECK(handle!=NULL, "invalid dev handle", ESP_ERR_INVALID_ARG);
SPI_CHECK((trans_desc->flags & SPI_TRANS_USE_RXDATA)==0 ||trans_desc->rxlength <= 32, "rxdata transfer > 32 bits",
ESP_ERR_INVALID_ARG);
SPI_CHECK((trans_desc->flags & SPI_TRANS_USE_TXDATA)==0 ||trans_desc->length <= 32, "txdata transfer > 32 bits",
ESP_ERR_INVALID_ARG);
SPI_CHECK(!((trans_desc->flags & (SPI_TRANS_MODE_DIO|SPI_TRANS_MODE_QIO)) && (handle->cfg.flags &
SPI_DEVICE_3WIRE)), "incompatible iface params", ESP_ERR_INVALID_ARG);
SPI_CHECK(!((trans_desc->flags & (SPI_TRANS_MODE_DIO|SPI_TRANS_MODE_QIO)) && (!(handle->cfg.flags &
SPI_DEVICE_HALFDUPLEX))), "incompatible iface params", ESP_ERR_INVALID_ARG);
r=xQueueSend(handle->trans_queue, (void*)&trans_desc, ticks_to_wait);
if (!r) return ESP_ERR_TIMEOUT;
ESP_LOGI(SPI_TAG,"Enable interrupt");
esp_intr_enable(handle->host->intr);
ESP_LOGI(SPI_TAG,"Done enabling interrupt");
return ESP_OK;
}