Hello all,
I have a quite unorthodox screen that requires that the SPI CS line comes back to 1 after each Byte.
I have a bit-banged solution that work well but I would prefer to be able to use DMA and hardware SPI.
When I tried I haven't found a suitable solution in the SDK.
Does Anyone have an idea?
Thank you in advance.
Best regards
Em
SPI CS toggling after each byte
-
- Posts: 9709
- Joined: Thu Nov 26, 2015 4:08 am
Re: SPI CS toggling after each byte
That is a strange requirement indeed... to be honest, I'm not sure if our hardware can do this. What display is this, if I may ask?
If you really need this as you describe, I can see two options:
- Use the I2S peripheral. You'll probably have to write your own driver, but I *think* it can be configured to do single transfers and then stop. You can use the WC signal as your toggling CS in this case; configure it so the left channel is your output byte and the right channel (when ws is high) is a constant.
- Use an external binary counter IC, connect the clk to the SPI clock output on the ESP32 and the divide-by-eight output to the CS input of the LCD.
If you really need this as you describe, I can see two options:
- Use the I2S peripheral. You'll probably have to write your own driver, but I *think* it can be configured to do single transfers and then stop. You can use the WC signal as your toggling CS in this case; configure it so the left channel is your output byte and the right channel (when ws is high) is a constant.
- Use an external binary counter IC, connect the clk to the SPI clock output on the ESP32 and the divide-by-eight output to the CS input of the LCD.
-
- Posts: 4
- Joined: Tue Feb 28, 2017 10:50 am
Re: SPI CS toggling after each byte
Sure, I'm using e-Paper screen used for electronic shelf label. the driver is made by a company named ultrachip from Taiwan.ESP_Sprite wrote:That is a strange requirement indeed... to be honest, I'm not sure if our hardware can do this. What display is this, if I may ask?
The timing is like that. From my point of view I don't really understand the use of a hardware CS implementation if the CS signal is so slow and can be easily made using a GPIO.
I like the I2C idea I will see if it can be implemented likewise. For the moment the bit-bang implementation can go up to 2Mb/s but take 100% of a processor during the image transfers.ESP_Sprite wrote: If you really need this as you describe, I can see two options:
- Use the I2S peripheral. You'll probably have to write your own driver, but I *think* it can be configured to do single transfers and then stop. You can use the WC signal as your toggling CS in this case; configure it so the left channel is your output byte and the right channel (when ws is high) is a constant.
- Use an external binary counter IC, connect the clk to the SPI clock output on the ESP32 and the divide-by-eight output to the CS input of the LCD.
Thank you for your time and best regards
Em
-
- Posts: 9709
- Joined: Thu Nov 26, 2015 4:08 am
Re: SPI CS toggling after each byte
The thing is that you can get the SPI hardware to set specific CS timings, depending on your type of transfer. GPIO-based CS timings can be fairly random, depending on what the CPU is doing.
The CS signal indeed is pretty weird... are you 100% sure you *must* make the CS line high between every byte? Most 9-bit SPI slave implementations will just start on a next byte after the 9th bit has come in.
The CS signal indeed is pretty weird... are you 100% sure you *must* make the CS line high between every byte? Most 9-bit SPI slave implementations will just start on a next byte after the 9th bit has come in.
Who is online
Users browsing this forum: No registered users and 95 guests