ESP32-S2 APB CLOCK is slow?

[kalata23]

I'm trying to toggle GPIO18 every 50 ns. First I started with Group 0 Timer 1 interrupt routine, which to be triggered every 50 ns, but as I can see with oscilloscope, the ON/OFF period is about 3 us instead of 50 ns. I have tried to manipulate registers, instead of calling gpio_set_direction() or gpio_set_level(), but this didn't helped much. My last hope was to make endless loop in main function and set and clear 18th bit of GPIO_OUT_W1TC / GPIO_OUT_W1TS register.At the end i achieved only 50 ns for ON/OFF state.
According to ESP32S2 documentation, if I set CPU clock at 160 MHz, APB_CLK should be 80 MHz, but it seems that APB_CLK is nearly 8MHz.

[ESP_igrr]

Hi kalata23,

The issue you are observing is probably not related to the APB clock, but to the fact that interrupt entry has certain latency. It is not practical to have interrupts which occur more often than a few microseconds, unless you are using high-level interrupt handlers written in assembly (https://docs.espressif.com/projects/esp ... rupts.html).

For the problem you are trying to solve (generate a waveform), ESP32-S2 provides some hardware peripherals. RMT peripheral can generate arbitrary waveforms based on a list of low/high pulse durations, without CPU intervention. Please check the docs here: https://docs.espressif.com/projects/esp ... s/rmt.html and examples here: https://github.com/espressif/esp-idf/tr ... herals/rmt.

ESP32-S2 also has "dedicated GPIO" instructions, which allow the CPU to access GPIOs without extra latency caused by the APB. We don't yet have an example of using these instructions in IDF, but there is a snippet available at https://gist.github.com/igrr/1515d36931 ... afeed4aac5 which may help you get started.

[kalata23]

Hi ESP_igrr,
Thank you for your advice. I will follow the links, that you shared. It's interesting for me, that if I write small program which toggles GPIO18 in endless loop, the ON/OFF time is nearly 50 ns, when ESP32S2 is set to 160MHz clock

Code: Select all

#include <stdio.h>
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "driver/gpio.h"
#include "sdkconfig.h"

void app_main(void)
{
		REG_WRITE(GPIO_ENABLE_REG, BIT18);
		while(1) {

				REG_WRITE(GPIO_OUT_W1TS_REG, BIT18);
				REG_WRITE(GPIO_OUT_W1TC_REG, BIT18);

				REG_WRITE(GPIO_OUT_W1TS_REG, BIT18);
				REG_WRITE(GPIO_OUT_W1TC_REG, BIT18);

				REG_WRITE(GPIO_OUT_W1TS_REG, BIT18);
				REG_WRITE(GPIO_OUT_W1TC_REG, BIT18);

				REG_WRITE(GPIO_OUT_W1TS_REG, BIT18);
				REG_WRITE(GPIO_OUT_W1TC_REG, BIT18);

				vTaskDelay(100 / portTICK_PERIOD_MS);
    }
}

[ESP_Sprite]

The APB bus has some latency, and as the GPIO registers are defined as volatile, the core will make sure the APB write has succeeded before sending a new one. That takes a few clock cycles, so I'm entirely not surprised that you only reach 50ns.

[kalata23]

I understand now, thank you.