Error Flash Startup "flash read err, 1000"

[_0b00t_]

Hi,
I have designed a PCB using ESP WROVER B module. I can program the flash without issue and the auto reset circuit works too.
But when I press EN button for hard reset, I have this error "flash read err, 1000" an then it restart and boot normaly with RTCWDT_RTC_RESET :

Code: Select all

rst:0x1 (POWERON_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
flash read err, 1000
ets_main.c 371 
ets Jun  8 2016 00:22:57

rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:2
load:0x3fff0018,len:4
load:0x3fff001c,len:6356
load:0x40078000,len:11304
load:0x40080400,len:6700
entry 0x40080764
I (29) boot: ESP-IDF v4.0-dev-478-gdf61612f8 2nd stage bootloader
I (30) boot: compile time 19:50:59
I (30) boot: Enabling RNG early entropy source...
I (36) boot: SPI Speed      : 40MHz
I (40) boot: SPI Mode       : DIO
I (44) boot: SPI Flash Size : 8MB
I (48) boot: Partition Table:
I (51) boot: ## Label            Usage          Type ST Offset   Length
I (59) boot:  0 nvs              WiFi data        01 02 00009000 00006000
I (66) boot:  1 phy_init         RF data          01 01 0000f000 00001000
I (74) boot:  2 factory          factory app      00 00 00010000 00100000
I (81) boot: End of partition table
I (85) esp_image: segment 0: paddr=0x00010020 vaddr=0x3f400020 size=0x0e580 ( 58752) map
I (115) esp_image: segment 1: paddr=0x0001e5a8 vaddr=0x3ffb0000 size=0x01a68 (  6760) load
I (118) esp_image: segment 2: paddr=0x00020018 vaddr=0x400d0018 size=0x18d04 (101636) map
I (157) esp_image: segment 3: paddr=0x00038d24 vaddr=0x3ffb1a68 size=0x004f0 (  1264) load
I (158) esp_image: segment 4: paddr=0x0003921c vaddr=0x40080000 size=0x00400 (  1024) load
I (164) esp_image: segment 5: paddr=0x00039624 vaddr=0x40080400 size=0x0a218 ( 41496) load
I (196) boot: Loaded app from partition at offset 0x10000
I (196) boot: Disabling RNG early entropy source...
I (197) cpu_start: Pro cpu up.
I (200) cpu_start: Application information:
I (205) cpu_start: Project name:     app-template
I (211) cpu_start: App version:      716f17b
I (215) cpu_start: Compile time:     May 15 2020 20:55:41
I (222) cpu_start: ELF file SHA256:  9f511581718dfe88...
I (228) cpu_start: ESP-IDF:          v4.0-dev-478-gdf61612f8
I (234) cpu_start: Starting app cpu, entry point is 0x40080fec
I (0) cpu_start: App cpu up.
I (244) heap_init: Initializing. RAM available for dynamic allocation:
I (251) heap_init: At 3FFAE6E0 len 00001920 (6 KiB): DRAM
I (257) heap_init: At 3FFB3648 len 0002C9B8 (178 KiB): DRAM
I (264) heap_init: At 3FFE0440 len 00003AE0 (14 KiB): D/IRAM
I (270) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM
I (276) heap_init: At 4008A618 len 000159E8 (86 KiB): IRAM
I (282) cpu_start: Pro cpu start user code
I (301) cpu_start: Starting scheduler on PRO CPU.
I (0) cpu_start: Starting scheduler on APP CPU.

If the reset is caused by RTS/DTR via the programming cable, it works fine.
It seems that it's related to the startup speed of flash chip because I tested both with a ESP-WROVER-B with 4 MB and 8MB flash, and the errors occurs only with the one with 8MB size. Another thread suggest this too : viewtopic.php?t=12856#.

The circuit for EN pin is :

en.PNG (7.57 KiB) Viewed 4217 times

I don't understand why it appears only with hard reset and not with RTS/DTR signals via the programming cable ?
Is there a way to avoid this error by changing values of RC circuit for the button (C4 & R1) ?

Thanks for reading

[_0b00t_]

Any advice ?

[ESP_Angus]

Hi _0boot_,

You're right that this error is to do with the power-on time of attached flash. Apart from adding additional UART output and a short delay to the power-on start time, there is no other negative effect from this error.

I can't say for certain why you only see this pattern when pressing the manual EN button. My best guess is that EN is held low for longer in the manual reset case, meaning the VCC of the SPI flash chip will discharge to a lower voltage, meaning the SPI flash has already gone into a power-down state when the ESP32 comes out of reset.

Also, the "auto reset circuit" means the chip may reset twice after flashing - it is reset once by esptool if the default "--after hard_reset" option is passed to esptool.py, this reset pulse holds EN low for 100ms. However a second reset may occur due to the OS toggling DTR/RTS momentarily when connecting again to view the UART output (depends on the program, OS, and drivers but in some circumstances this happens outside of software control). This second reset pulse may be much shorter than 100ms, and this may be the one which is not long enough for the SPI flash chip to turn off - meaning that coming out of reset the flash chip is still powered.