Pretty new to the ESP32. I'm trying to interface it with Silicon Labs CP2615 USB-I2S bridge.
- CP2615 can only function as I2S master
- The bitclock is not continuous, but in bursts.
- The bursts always come in 24 pulses, even if you set the bridge to 16bit mode (needed, because playback + recording should be possible at the same time). See https://www.silabs.com/community/interf ... decad-84UG
Code: Select all
i2s_config_t i2s_config = {
.mode = I2S_MODE_SLAVE | I2S_MODE_TX, // Only TX
.sample_rate = 48000,
.bits_per_sample = 16,
.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, //2-channels
.communication_format = I2S_COMM_FORMAT_I2S | I2S_COMM_FORMAT_I2S_MSB,
.dma_buf_count = 6,
.dma_buf_len = 60, //
.intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 //Interrupt level 1
.use_apll = true
};
- changing i2s_set_clk(0, sample_rate, 16, 2) to i2s_set_clk(0, sample_rate, 24, 2); on line 114 of bt_app_av.c
- calling i2s_write_expand (16 src, 24 aim) instead of i2s_write on line 57 of bt_app_av.c
- I noticed the data was being pushed out on the rising edge of the clock instead of falling, while this was not the case in master mode. Rather odd, tried multiplying the fi2s_clk with a factor 3/2 on line 434 of i2s.c because the bursts are about 3/2 faster than a normal bitclock. Not really trusting this one..
Something else I came across. The technical reference manual says:
I'm not sure what this means.. Right now the bridge is just supplying the bitclock and the LRclock.when esp32 i2s works in slave mode, the master must use i2sn_clk as the master clock and fi2s >= 8 * fbck.
I have a lot more research to do but if anyone has experience, ideas, knowledge this will not work,.. please shoot!
Many thanks!