Problem programming bare metal PWM

albuereta
Posts: 1
Joined: Tue Sep 10, 2024 2:01 pm

Problem programming bare metal PWM

Postby albuereta » Tue Sep 10, 2024 2:11 pm

Hi, i'm trying to create a test pwm and route it throughout the gpio5, i'm currently waiting to get de JTAG to be able to debug my code in any way, right now i'm pretty much blind, i can only see what i get at the output pin and i'm not able to see what could i be doing wrong, it is also mi first post in this forum and i'm not sure how i should paste the code so forgive me if i commit any mistakes and thank you for your time.

I am also using a custom library where i defined all the names of the registers with their respective address, that is the reason of all the pointers.

  1.  
  2. volatile uint32_t *gpio_enable_reg = (volatile uint32_t *)GPIO_ENABLE_REG;
  3.  
  4. /*----------------------------HIGH SPEED TIMER-----------------------------------*/
  5. volatile uint32_t *ledc_hsch0_conf0_reg = (volatile uint32_t *)LEDC_HSCH0_CONF0_REG;
  6. volatile uint32_t *ledc_hsch0_hpoint_reg = (volatile uint32_t *)LEDC_HSCH0_HPOINT_REG;
  7. volatile uint32_t *ledc_hsch0_duty_reg = (volatile uint32_t *) LEDC_HSCH0_DUTY_REG;
  8. volatile uint32_t *ledc_hsch0_conf1_reg = (volatile uint32_t *) LEDC_HSCH0_CONF1_REG;
  9. volatile uint32_t *ledc_hsch0_duty_r_reg = (volatile uint32_t *)  LEDC_HSCH0_DUTY_R_REG;
  10.  
  11. /*----------------------------LOW SPEED PWM  ------------------------------------*/
  12. volatile uint32_t *ledc_lsch0_conf0_reg = (volatile uint32_t *)LEDC_LSCH0_CONF0_REG;
  13. volatile uint32_t *ledc_lsch0_hpoint_reg = (volatile uint32_t *)LEDC_LSCH0_HPOINT_REG;
  14. volatile uint32_t *ledc_lsch0_duty_reg = (volatile uint32_t *) LEDC_LSCH0_DUTY_REG;
  15. volatile uint32_t *ledc_lsch0_conf1_reg = (volatile uint32_t *) LEDC_LSCH0_CONF1_REG;
  16. volatile uint32_t *ledc_lsch0_duty_r_reg = (volatile uint32_t *)  LEDC_LSCH0_DUTY_R_REG;
  17.  
  18. /*----------------------------LOW SPEED TIMER------------------------------------*/
  19. volatile uint32_t *ledc_lstimer0_conf_reg= (volatile uint32_t *)LEDC_LSTIMER0_CONF_REG;
  20. volatile uint32_t *ledc_lstimer0_value_reg = (volatile uint32_t *)LEDC_LSTIMER0_VALUE_REG;
  21. volatile uint32_t *ledc_conf_reg = (volatile uint32_t *) LEDC_CONF_REG;
  22.  
  23.  
  24. /*---------------------------GPIO MATRIX CONFIG----------------------------------*/
  25.  
  26. //OUTPUT CONTROL
  27. volatile uint32_t *gpio_out_reg = (volatile uint32_t *) GPIO_OUT_REG; // REGISTRE QUE AFECTA ALS GPIO DEL 0 AL 31
  28. volatile uint32_t *gpio_out_w1ts_reg = (volatile uint32_t *) GPIO_OUT_W1TS_REG; // REGISTRE PER FICAR BITS A 1 DEL OUT_REG
  29. volatile uint32_t *gpio_out_w1tc_reg = (volatile uint32_t *) GPIO_OUT_W1TC_REG; // REGISTRE PER FICAR BITS A 0 DEL OUT_REG
  30.  
  31.  
  32.  
  33. //OUTPUT ENABLE
  34. //volatile uint32_t *gpio_enable_reg = (volatile uint32_t *)  GPIO_ENABLE_REG; // REGISTRE PER HABILITAR ELS GPIO DEL 0 AL 31
  35. volatile uint32_t *gpio_enable_w1ts_reg = (volatile uint32_t *) GPIO_ENABLE_W1TS_REG; // REGISTRE PER FICAR BITS A 1 DEL OUT_ENABLE
  36. volatile uint32_t *gpio_enable_witc_reg = (volatile uint32_t *) GPIO_ENABLE_W1TC_REG; // REGISTRE PER FICAR BITS A 0 DEL OUT_ENABLE
  37.  
  38.  
  39. //PIN CONFIGURATION
  40. volatile uint32_t *gpio_pin5_reg = (volatile uint32_t *)  GPIO_PIN5_REG; // REGISTRE PER HABILITAR ELS GPIO DEL 0 AL 31
  41. volatile uint32_t *gpio_func5_out_sel_cfg_reg = (volatile uint32_t *) GPIO_FUNC0_OUT_SEL_CFG_REG; // REGISTRE PER FICAR BITS A 1 DEL OUT_ENABLE
  42.  
  43.  
  44. /*------------------------------IO MUX CONFIG-----------------------------------*/
  45. volatile uint32_t *io_mux_gpio5_reg = (volatile uint32_t *) IO_MUX_GPIO5_REG; // REGISTRE PER HABILITAR ELS GPIO DEL 0 AL 31
  46.  
  47.  
  48.  
  49.  
  50.  
  51.  
  52. void app_main()
  53. {
  54.  *gpio_enable_reg = 0xFFFFFFFF;
  55.  
  56.  
  57.  /*ACTIVACION PWM LEDC*/
  58.  
  59. /*------------------------DESACTIVEM EL HIGH SPEED TIMER---------------------*/
  60.  *ledc_hsch0_conf0_reg=0x00000000;
  61. *ledc_hsch0_hpoint_reg=0x00000000;
  62.   *ledc_hsch0_duty_reg=0x00000000;
  63.  *ledc_hsch0_conf1_reg=0x00000000;
  64. *ledc_hsch0_duty_r_reg=0x00000000;
  65.                        
  66.  
  67. /*------------------------CONFIGUREM EL LOW SPEED PWM------------------------*/
  68. *ledc_lsch0_conf0_reg=0b00000000000000000000000000000100; // configuracio dels bits 4-0 on configurem el timer 0 i el output enable
  69. *ledc_lsch0_hpoint_reg=0b00000000000011111111111111111111; // configuracion del numero maximo al que llegara el timer
  70.   *ledc_lsch0_duty_reg=0x0003FFFF; // configuracion del duty cycle
  71.  *ledc_lsch0_conf1_reg=0x00000000; // registro utilizado para aplicar incrementos y decrementos graduales al duty cycle
  72.  *ledc_lsch0_conf1_reg=0b10000000000000000000000000000000;//ejecutar esta linia para aplicar el incremento o decremento del duty cicle configurado en la linia anterior.
  73. *ledc_lsch0_duty_r_reg=0x00000000; // registre de lectura del duty cycle en remps real
  74.  
  75.  
  76. /*-----------------------CONFIGUREM EL TIMER 0-------------------------------*/
  77. *ledc_conf_reg=         0x00000001; // freq de 8 MHz
  78. *ledc_lstimer0_conf_reg=0b00000010010011100010000000001010;// registre que configura el preescaler del timer
  79.  
  80.  
  81.  
  82. /*-------------CONFIGUREM LA MATRIU GPIO PER ENRUTAR LA SENYAL PWM-----------*/
  83.  
  84. /*
  85. //OUTPUT CONTROL
  86.  *gpio_out_reg = 0x00000000; // REGISTRE QUE AFECTA ALS GPIO DEL 0 AL 31
  87.  *gpio_out_reg =
  88.  
  89.  *gpio_out_w1ts_reg = 0x00000000; // REGISTRE PER FICAR BITS A 1 DEL OUT_REG
  90.  *gpio_out_w1ts_reg =
  91.  
  92. *gpio_out_w1tc_reg = 0x00000000; // REGISTRE PER FICAR BITS A 0 DEL OUT_REG
  93. *gpio_out_w1tc_reg =
  94. */
  95.  
  96. //OUTPUT ENABLE
  97. *gpio_enable_reg = 0x00000000; // REGISTRE PER HABILITAR ELS GPIO DEL 0 AL 31
  98.  
  99.  
  100.  *gpio_enable_w1ts_reg = 0x00000000; // REGISTRE PER FICAR BITS A 1 DEL OUT_ENABLE
  101.  *gpio_enable_w1ts_reg |=(1<<GPIO5);
  102.  
  103.  *gpio_enable_witc_reg = 0x00000000; // REGISTRE PER FICAR BITS A 0 DEL OUT_ENABLE
  104.  
  105.  
  106. //GPIO PIN CONFIGURATION
  107.  *gpio_pin5_reg = 0x00000000; // REGISTRE PER HABILITAR ELS GPIO DEL 0 AL 31 (INTERRUPCIONS)
  108.  
  109.  
  110.  *gpio_func5_out_sel_cfg_reg = 0x00000000; // REGISTRE PER FICAR BITS A 1 DEL OUT_ENABLE
  111.  *gpio_func5_out_sel_cfg_reg = 0b00000000000000000000010001100010;
  112.  
  113. //IO_MUX_CONFIGURATION
  114.  
  115. *io_mux_gpio5_reg = 0x00000000;
  116. *io_mux_gpio5_reg = 0b00000000000000000000100000000000;
  117.  
  118.  
  119.  
  120.  
  121.  
  122.  
  123.  
  124.  
  125. }

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