[solved] Setting RTC register bits fails (ESP32-S3)

[cbaurtx]

I want to initialize the RTC I2C controller using the main processor of the ESP32-S3
As en example setting RTC_I2C_SCL_LOW_REG

SET_PERI_REG_BITS(RTC_I2C_SCL_LOW_REG, RTC_I2C_SCL_LOW_PERIOD_REG, 40, RTC_I2C_SCL_LOW_PERIOD_REG_S); // SCL low/high period = 40, which result driving SCL with 100kHz.
ESP_LOGI(TAG, "RTC_I2C_SCL_LOW_REG = %d", READ_PERI_REG(RTC_I2C_SCL_LOW_REG));

When executing the code the read back returns the default value (256) and not the set value (40).

I use IDF which is part of an ADF installation, IDF Version v4.4-dev-5980-g3c8bc2213c-dirty ADF Version v2.6

[ESP_Sprite]

Hm, that smells like that peripheral or power domain is not enabled. The RTC I2C peripheral is part of the ULP coprocessor; you can see if you somehow can enable that and if that makes the register writable.

[cbaurtx]

Thank you for answering that quickly. What you said makes a lot of sense, however I can
use the RTC GPIO without any problems. How can I turn the RTC power domain on or off to
double check?

[cbaurtx]

Code: [Select all] [Expand/Collapse]

1. #include <stdio.h>
2. #include <stdlib.h>
3. #include <string.h>
4. #include "freertos/FreeRTOS.h"
5. #include "freertos/task.h"
6.  
7. #define TAG "test_write_rtc_reg.c"
8.  
9. #if ESP_IDF_VERSION_MAJOR < 5
10.   #include "driver/rtc_cntl.h"
11. #else
12.   #include "esp_private/rtc_ctrl.h"
13. #endif
14.  
15. #include "driver/rtc_io.h"
16. #include "soc/rtc_i2c_reg.h"
17. #include "esp_log.h"
18.  
19. int app_main(void) {
20. #if CONFIG_IDF_TARGET_ESP32
21.   #pragma message "IDF Target ESP32"
22.  
23.   SET_PERI_REG_BITS(RTC_I2C_SCL_LOW_PERIOD_REG, RTC_I2C_SCL_LOW_PERIOD, 40, RTC_I2C_SCL_LOW_PERIOD_S);
24.   ESP_LOGI(TAG, "ESP32 RTC_I2C_SCL_LOW_REG =  %d", READ_PERI_REG(RTC_I2C_SCL_LOW_PERIOD_REG));
25.  
26.   SET_PERI_REG_BITS(RTC_I2C_SCL_LOW_PERIOD_REG, RTC_I2C_SCL_LOW_PERIOD, 20, RTC_I2C_SCL_LOW_PERIOD_S);
27.   ESP_LOGI(TAG, "ESP32 RTC_I2C_SCL_LOW_REG =  %d", READ_PERI_REG(RTC_I2C_SCL_LOW_PERIOD_REG));
28.  
29. #endif
30.  
31.  
32. #if CONFIG_IDF_TARGET_ESP32S3
33.   #pragma message "IDF Target ESP32-S3"
34.  
35.   SET_PERI_REG_BITS(RTC_I2C_SCL_LOW_REG, RTC_I2C_SCL_LOW_PERIOD_REG_M, 40, RTC_I2C_SCL_LOW_PERIOD_REG_S);
36.   ESP_LOGI(TAG, "ESP32S3 RTC_I2C_SCL_LOW_REG =  %d", READ_PERI_REG(RTC_I2C_SCL_LOW_REG));
37.  
38.   SET_PERI_REG_BITS(RTC_I2C_SCL_LOW_REG, RTC_I2C_SCL_LOW_PERIOD_REG, 20, RTC_I2C_SCL_LOW_PERIOD_REG_S);
39.   ESP_LOGI(TAG, "ESP32S3 RTC_I2C_SCL_LOW_REG =  %d", READ_PERI_REG(RTC_I2C_SCL_LOW_REG));
40.  
41. #endif
42.  
43. for(;;);
44.  
45. }

GeSHi © Codebox Plus Extension

I did some more tests. This code works with an ESP32 but not with an ESP32-S3
With the ESP32-S3 the default value is returned. How are the default values set?

[cbaurtx]

Finally I got it working and I blame poor documentation for my problem. Looking how the RiskV ULP initializes the rtc i2c I found this:

Code: Select all

/* For esp32s3, we need to enable the rtc_i2c clock gate before accessing rtc i2c    registers */
  SET_PERI_REG_MASK(SENS_SAR_PERI_CLK_GATE_CONF_REG, SENS_RTC_I2C_CLK_EN);

So insert this at line 34 and the rtc register can be set

[ESP_Sprite]

Finally I got it working and I blame poor documentation for my problem.

I entirely agree, I'll see if I can poke the documentation team to include this information in future releases. EDIT: Seems that chapter is the very last chapter in the TRM that is missing. People are working on it.