We are using a ESP-32 dev kit (ESP32-C6-DevKitC-1), and using the partitions API to read and write to FLASH, and it works well.
It's been a while since I've written code for nonvolatile FLASH... I seem to recall the need for a mechanism called bad block management, in which you scan for blocks that go bad over time, and mark them as "out of service" and skip past them going forward. Kind of a pain...
Is this necessary for the ESP32-C6-DevKitC-1 using the partitions API? Or (hopefully) has either the tech advanced and this isn't necessary, or does the ESP-IDF framework manage this somehow?
Thank you.
Do we need bad block management, and if so is there something in the API for it?
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Re: Do we need bad block management, and if so is there something in the API for it?
We use wear levelling so that we don't have to do bad block management
If you employ wear levelling but still expect to use significantly more than the typically specified ~1e5 writes to a single sector you may want to a) look into other storage than the internal flash, or b) actually come up with an error correction and bad block management system. Haven't seen anyone (have the need to) do this yet though.
If you employ wear levelling but still expect to use significantly more than the typically specified ~1e5 writes to a single sector you may want to a) look into other storage than the internal flash, or b) actually come up with an error correction and bad block management system. Haven't seen anyone (have the need to) do this yet though.
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Re: Do we need bad block management, and if so is there something in the API for it?
Oh, great... no we are implementing a circular log over a span of blocks using the Partitions API, which will be sort of naturally wear-leveled. So I'm glad to hear that that eliminates the need for bad block management. I thought I remembered that the bad blocks could appear over time, and was a different mechanism than the 1e5 wearout. In fact I found an old article:
https://micron.com/-/media/client/globa ... _flash.pdf
that says NAND flash *ships* with some bad blocks, so you need a handling mechanism starting from day 1. But this should not be the case for us? If we wear level we are okay?
Thanks very much.
https://micron.com/-/media/client/globa ... _flash.pdf
that says NAND flash *ships* with some bad blocks, so you need a handling mechanism starting from day 1. But this should not be the case for us? If we wear level we are okay?
Thanks very much.
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Re: Do we need bad block management, and if so is there something in the API for it?
ESP32 generally uses NOR flash, not NAND flash.chris.f.rice wrote: ↑Mon Feb 19, 2024 12:17 amthat says NAND flash *ships* with some bad blocks, so you need a handling mechanism starting from day 1. But this should not be the case for us? If we wear level we are okay?
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