I can't really investigate the crash, since the last few words are unreadable due to UART corruption.
Since IO0, IO1 and IO3 can all be configured to be the I2S MCLK output, I have configured the GPIO Matrix to set their functions as I expect them to be
Code: Select all
PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO0_U, FUNC_GPIO0_CLK_OUT1);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD_U0TXD);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0RXD_U, FUNC_U0RXD_U0RXD);
Fortunately, I managed to capture a rare case of the ESP32 not crashing due to initialization of the I2S peripheral, but most of the times it crashes when initializing the tx channel.
Note: in order to get the I2S channel registered message to print, I had to remove the argument of printf which prints the ID of the I2S bus and add an fflush(stdout) to flush the buffers below the ESP_LOGD line.
This is the console output:
Code: Select all
Using mSBC codec.
I (33387) Audio: Initialize with handle and codec
D (33387) Audio: Setting SCO handle
D (33387) Audio: Setting codec to 2
I (33387) Audio: Initializing negotiated codec..
I (33387) Audio: Initializing mSBC codec
I (33387) Audio: Initializing playback system
D (33387) Audio: Initializing output ring buffers
D (33387) Audio: Free heap: 105420
D (33387) i2s_common: tx channel is registered on I2>f�|�8�<�0���8?�<����>��8??���������8�8x~�����|����|`���|x�p�8�|
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D (33397) i2s_std: Clock division info: [sclk] 8191999 Hz [mdiv] 1 [mclk] 4096000 Hz [bdiv] 8 [bclk] 512000 Hz
V (33397) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): checking args
V (33397) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): Args okay. Resulting flags 0x90E
D (33397) intr_alloc: Connected src 32 to int 13 (cpu 0)
D (33397) i2s_std: The tx channel on I2S0 has been initialized to STD mode successfully
D (33407) i2s_common: MCLK is pinned to GPIO0 on I2S0
V (33407) i2s_common: desc addr: 0x3ffe96b0 buffer addr:0x3ffe96c0
V (33407) i2s_common: desc addr: 0x3ffe9944 buffer addr:0x3ffe9954
V (33407) i2s_common: desc addr: 0x3ffe9bd8 buffer addr:0x3ffe9be8
V (33407) i2s_common: desc addr: 0x3ffe9e6c buffer addr:0x3ffe9e7c
V (33407) i2s_common: desc addr: 0x3ffea100 buffer addr:0x3ffea110
V (33407) i2s_common: desc addr: 0x3ffea394 buffer addr:0x3ffea3a4
D (33407) i2s_common: DMA malloc info: dma_desc_num = 6, dma_desc_buf_size = dma_frame_num * slot_num * data_bit_width = 640
W (33407) i2s_common: APLL is occupied already, it is working at 8191999 Hz while the expected frequency is 8192000 Hz
W (33407) i2s_common: Trying to work at 8191999 Hz...
D (33407) i2s_common: APLL expected frequency is 8192000 Hz, real frequency is 8191999 Hz
D (33417) i2s_std: Clock division info: [sclk] 8191999 Hz [mdiv] 1 [mclk] 4096000 Hz [bdiv] 8 [bclk] 512000 Hz
V (33417) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): checking args
V (33417) intr_alloc: esp_intr_alloc_intrstatus (cpu 0): Args okay. Resulting flags 0x90E
D (33417) intr_alloc: Connected src 32 to int 13 (cpu 0)
D (33417) i2s_std: The rx channel on I2S0 has been initialized to STD mode successfully
E (33417) Audio: Audio sink failed to initialize
I (43247) BlueStack: Terminating audio system
[+] Connection closed
Service level connection released.
FEX 0 8
FEX 11 11