I want to use gpTimer 0 for high prio irq. The irq handler (assembly) is called, but after rfi i get an unhandled kernel error. I have set the timer for Freertos to timer 1. I hope someone can help.
My very stripped down C code:
Code: Select all
#include "driver/gptimer.h"
void xt_highint5( void);
void RegisterInt(void *you_need_this)
{
gptimer_handle_t gptimer = NULL;
gptimer_config_t timer_config = {
.clk_src = GPTIMER_CLK_SRC_DEFAULT,
.direction = GPTIMER_COUNT_UP,
.resolution_hz = 1000000, // 1MHz, 1 tick=1us
};
ESP_ERROR_CHECK(gptimer_new_timer(&timer_config, &gptimer));
gptimer_event_callbacks_t cbs = { .on_alarm = xt_highint5, };
ESP_ERROR_CHECK(gptimer_register_event_callbacks(gptimer, &cbs, NULL));
esp_intr_alloc(ETS_TG0_T0_EDGE_INTR_SOURCE, ESP_INTR_FLAG_LEVEL5|ESP_INTR_FLAG_IRAM, NULL, NULL, NULL);
ESP_ERROR_CHECK(gptimer_enable(gptimer));
gptimer_alarm_config_t alarm_config1 = {
.alarm_count = 1000000, // period = 1s
};
ESP_ERROR_CHECK(gptimer_set_alarm_action(gptimer, &alarm_config1));
ESP_ERROR_CHECK(gptimer_start(gptimer));
while(1) vTaskDelay(300/portTICK_PERIOD_MS);
}
void app_main(void)
{
xTaskCreatePinnedToCore(RegisterInt,"allocEXTGPIOINT",4096,NULL,0,NULL,0);
while(1){
vTaskDelay(300/portTICK_PERIOD_MS);
}
}
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#include <xtensa/coreasm.h>
#include <xtensa/corebits.h>
#include <xtensa/config/system.h>
#include "freertos/xtensa_context.h"
#include "esp_private/panic_reason.h"
#include "sdkconfig.h"
#include "soc/soc.h"
#include "soc/gpio_reg.h"
#include "soc/timer_group_reg.h"
#define L5_INTR_A2_OFFSET 0
#define L5_INTR_A3_OFFSET 4
#define L5_INTR_A4_OFFSET 8
#define L5_INTR_A5_OFFSET 12
#define L5_INTR_A6_OFFSET 16
#define L5_INTR_SAR_OFFSET 20
#define L5_INTR_STACK_SIZE 24
.data
_l5_intr_stack:
.space L5_INTR_STACK_SIZE
pps_entry_end:
.section .iram1,"ax"
.global xt_highint5
.type xt_highint5,@function
.align 4
xt_highint5:
/* Save A2, A3, A4, A5 so we can use those registers */
movi a0, _l5_intr_stack
s32i a2, a0, L5_INTR_A2_OFFSET
s32i a3, a0, L5_INTR_A3_OFFSET
s32i a4, a0, L5_INTR_A4_OFFSET
s32i a5, a0, L5_INTR_A5_OFFSET
s32i a6, a0, L5_INTR_A6_OFFSET
rsr a6, SAR
s32i a6, a0, L5_INTR_SAR_OFFSET
movi a2, TIMG_INT_CLR_TIMERS_REG(0) // clr irq
movi a0, TIMG_T0_INT_CLR
s32i a0, a2, 0
memw
exit_interrupt:
/* Done. Restore registers and return. */
movi a0, _l5_intr_stack
l32i a2, a0, L5_INTR_SAR_OFFSET
wsr a2, SAR
l32i a2, a0, L5_INTR_A2_OFFSET
l32i a3, a0, L5_INTR_A3_OFFSET
l32i a4, a0, L5_INTR_A4_OFFSET
l32i a5, a0, L5_INTR_A5_OFFSET
l32i a6, a0, L5_INTR_A6_OFFSET
rsync /* ensure register restored */
rsr a0, EXCSAVE_5 // restore a0
rfi 5
/* The linker has no reason to link in this file; all symbols it exports are already defined
(weakly!) in the default int handler. Define a symbol here so we can use it to have the
linker inspect this anyway. */
.global ld_include_xt_highint5
ld_include_xt_highint5:
[11:23:32:741] Guru Meditation Error: Core 0 panic'ed (Unhandled debug exception). ␍␊
[11:23:32:741] Debug exception reason: BREAK instr ␍␊
[11:23:32:741] Core 0 register dump:␍␊
[11:23:32:741] PC : 0x40082c94 PS : 0x00000016 A0 : 0x40080306 A1 : 0x3ffb0d00 ␍␊
[11:23:32:756] A2 : 0x3ffb6b58 A3 : 0x3ffb6c08 A4 : 0x40082c2c A5 : 0x400880d6 ␍␊
[11:23:32:756] A6 : 0x00000000 A7 : 0x00000019 A8 : 0x800831ff A9 : 0x3ffb0ce0 ␍␊
[11:23:32:772] A10 : 0x3ffb6b58 A11 : 0x3ffb0d00 A12 : 0x00000000 A13 : 0x00060023 ␍␊
[11:23:32:772] A14 : 0xb33fffff A15 : 0xb33fffff SAR : 0x00000020 EXCCAUSE: 0x00000001 ␍␊
[11:23:32:790] EXCVADDR: 0x00000000 LBEG : 0x00000000 LEND : 0x00000000 LCOUNT : 0x00000000 ␍␊
Dig