ESP32-S3: Sampling instant for I2S peripheral in PDM RX mode

tschalch
Posts: 1
Joined: Tue Aug 08, 2023 7:19 am

ESP32-S3: Sampling instant for I2S peripheral in PDM RX mode

Postby tschalch » Tue Aug 08, 2023 7:55 am

I observe a strange behavior when using the I2S peripheral of the ESP32-S3 in PDM RX mode using ESP-IDF version 4.4.3.

Receiving data from two PDM microphones (Infineon IM69D130) works fine with a PDM clock frequency of around 1.4 MHz. I have configured one microphone to output its PDM signal on left channel and the other microphone to output its PDM signal on right channel. I can receive the data as expected on the correct channel (left/right). I use an audio sampling rate of 22kHz (= PDM clock of 22k*64 = 1.408 MHz)

Problem
If I set the decimation factor from 64 (default) to 128 using the function "i2s_set_pdm_rx_down_sample(I2S_NUM_0, I2S_PDM_DSR_16S);", channels suddenly get inverted (I receive the signal from the left microphone on the right channel and vice versa)!

Analysis
I get inverted (wrong) channel signals with the following settings:
* If I use half of the audio sample rate by setting "i2s_set_pdm_rx_down_sample(I2S_NUM_0, I2S_PDM_DSR_16S);" and the I2S sampling rate to half of the value (i.e. 11 kHz). The resulting PDM clock is still 1.408 MHz (verified with an oscilloscope).
* If I increase the PDM clock frequency by setting "i2s_set_pdm_rx_down_sample(I2S_NUM_0, I2S_PDM_DSR_16S);" with the sample I2S sampling rate of 22 kHz. The resulting PDM clock is then 2.816 MHz (also verified with an oscilloscope).

I get the correct channel signals with the following settings:
* If I use the original setting of default decimation rate of 64, audio sampling rate 22 kHz and resulting PDM clock of 1.408 MHz (verified with an oscilloscope).
* If I use the default decimation rate of 64, audio sampling rate 44 kHz and resulting PDM clock of 2.816 MHz (verified with an oscilloscope).

Questions
I can see two options why this happens:
* Either it is a software bug in ESP-IDF that the channels get inverted when using the "i2s_set_pdm_rx_down_sample(I2S_NUM_0, I2S_PDM_DSR_16S);" setting.
* Or something with the sampling instant of the signal changes when using the other decimation factor. According to the datasheet of the microphone (see screenshot in attachment), the PDM signal needs (max.) 100ns after the clock edge to be valid. The ESP32 must sample the signal at the next edge. However, I did not find any information about the exact sampling instant of the ESP32 for PDM/I2S signals.

-> Does the ESP32 sample the I2S/PDM signal on the next clock edge or somewhere in between the clock edges?
-> What exactly does the i2s_set_pdm_rx_down_sample function? Is it possible, that is changes the channel configuration?
Attachments
2023-08-08_pdm-mic.png
2023-08-08_pdm-mic.png (71.32 KiB) Viewed 1288 times

Who is online

Users browsing this forum: benrank, Majestic-12 [Bot] and 93 guests