How to mask the interrupts?

[tobewinner]

In ESP8266 RTOS SDK, I can mask the interrupts with the func(_xt_isr_mask), and unmask them with func(_xt_isr_unmask).
As I understand, when the specific interrupt is masked, the corresponding interrupt callback will not be called untill it is unmasked.
if the specific interrupt occurs when it is masked, the corresponding interrupt callback will be called at the time it is unmasked.

but I can't find these funcs in esp-idf, is there any help?

[ESP_igrr]

In ESP32, hardware interrupt sources are connected to CPU interrupt inputs using an interrupt matrix. ESP-IDF provides APIs to simplify setup of interrupts and interrupt matrix:
http://esp-idf.readthedocs.io/en/latest ... alloc.html

You can use esp_intr_disable function to mask interrupts allocated using esp_intr_alloc.

If you for some reason manage your interrupts manually, use xt_ints_off/xt_ints_on to mask/unmask interrupts (you need to include "freertos/xtensa_api.h" to get these).

[tobewinner]

In ESP32, hardware interrupt sources are connected to CPU interrupt inputs using an interrupt matrix. ESP-IDF provides APIs to simplify setup of interrupts and interrupt matrix:
http://esp-idf.readthedocs.io/en/latest ... alloc.html

You can use esp_intr_disable function to mask interrupts allocated using esp_intr_alloc.

If you for some reason manage your interrupts manually, use xt_ints_off/xt_ints_on to mask/unmask interrupts (you need to include "freertos/xtensa_api.h" to get these).

thanks, there are some questions:
1, what is the differences between esp_intr_disable/esp_intr_enable and xt_ints_off/xt_ints_on?
2, As we know, ESP32 is a cpu with 2 cores, if the interrupt callback in running an a core, and the other core calls esp_intr_disable or xt_ints_off, will the func(esp_intr_disable or xt_ints_off) not return untill the running callback returns?
3, If the interrupt event occurs during the period that the orresponding interrupt is masked by esp_intr_disable(or xt_ints_off), will the callback be called after esp_intr_enalbe(or xt_ints_on)?

[ESP_igrr]

1, what is the differences between esp_intr_disable/esp_intr_enable and xt_ints_off/xt_ints_on?

esp_intr_disable/enable functions' argument is an opaque handle returned by esp_intr_alloc. For xt_ints_off/on, the argument is a 32-bit interrupt mask. You should not use xt_ints_off/on for interrupts allocated using esp_intr_alloc.
Another difference is that xt_ints_off always masks interrupts via CPU's INTENABLE register. As such, xt_ints_off can disable interrupts on the current CPU only. esp_intr_disable masks CPU internal interrupts (such as timer compare and profiling interrupts) using INTENABLE, while external interrupts (coming from peripherals) are masked using interrupt matrix. This allows disabling external interrupts routed to a CPU even if esp_intr_disable is called from the other CPU.

2, As we know, ESP32 is a cpu with 2 cores, if the interrupt callback in running an a core, and the other core calls esp_intr_disable or xt_ints_off, will the func(esp_intr_disable or xt_ints_off) not return untill the running callback returns?

You can not call xt_ints_off to disable interrupts of the other CPU. xt_ints_off/on only affect INTENABLE register of the CPU where they are called.
esp_intr_disable returns immediately, it does not wait for other CPU to do interrupt handling.

3, If the interrupt event occurs during the period that the orresponding interrupt is masked by esp_intr_disable(or xt_ints_off), will the callback be called after esp_intr_enalbe(or xt_ints_on)?

This depends on the specific interrupt type. Edge triggered interrupts will not be dispatched if they happen when interrupt is disabled. Level triggered interrupts are normally latched on the peripheral side, and need to be cleared explicitly by writing to interrupt clear register of the peripheral; therefore they will be dispatched as soon as you re-enable the interrupt.

[tobewinner]

1, what is the differences between esp_intr_disable/esp_intr_enable and xt_ints_off/xt_ints_on?

esp_intr_disable/enable functions' argument is an opaque handle returned by esp_intr_alloc. For xt_ints_off/on, the argument is a 32-bit interrupt mask. You should not use xt_ints_off/on for interrupts allocated using esp_intr_alloc.
Another difference is that xt_ints_off always masks interrupts via CPU's INTENABLE register. As such, xt_ints_off can disable interrupts on the current CPU only. esp_intr_disable masks CPU internal interrupts (such as timer compare and profiling interrupts) using INTENABLE, while external interrupts (coming from peripherals) are masked using interrupt matrix. This allows disabling external interrupts routed to a CPU even if esp_intr_disable is called from the other CPU.

2, As we know, ESP32 is a cpu with 2 cores, if the interrupt callback in running an a core, and the other core calls esp_intr_disable or xt_ints_off, will the func(esp_intr_disable or xt_ints_off) not return untill the running callback returns?

You can not call xt_ints_off to disable interrupts of the other CPU. xt_ints_off/on only affect INTENABLE register of the CPU where they are called.
esp_intr_disable returns immediately, it does not wait for other CPU to do interrupt handling.

3, If the interrupt event occurs during the period that the orresponding interrupt is masked by esp_intr_disable(or xt_ints_off), will the callback be called after esp_intr_enalbe(or xt_ints_on)?

This depends on the specific interrupt type. Edge triggered interrupts will not be dispatched if they happen when interrupt is disabled. Level triggered interrupts are normally latched on the peripheral side, and need to be cleared explicitly by writing to interrupt clear register of the peripheral; therefore they will be dispatched as soon as you re-enable the interrupt.

Thanks a lot!