DMA vs NO-DMA for SPI Communication
Posted: Tue Feb 26, 2019 3:57 am
Hi everyone,
I read the IDF documentation on SPI Master and I was confused about the use of DMA.
Under Speed and timing consideration, both Non-DMA Interrupt and Polling are faster than DMA driven Interrupt and Polling. So what is really the purpose of DMA in this context? Doesn't DMA free the CPU to handle other tasks?
"When the DMA is enabled, it needs about 2us per transaction to setup the linked list. When the master is transferring, it automatically read data from the linked list. If the DMA is not enabled, CPU has to write/read each byte to/from the FIFO by itself. Usually this is faster than 2us, but the transaction length is limited to 64 bytes for both write and read."
If my data transfer is less than 64 bytes, then DMA is actually worse than no-DMA, am I correct?
Thanks.
I read the IDF documentation on SPI Master and I was confused about the use of DMA.
Under Speed and timing consideration, both Non-DMA Interrupt and Polling are faster than DMA driven Interrupt and Polling. So what is really the purpose of DMA in this context? Doesn't DMA free the CPU to handle other tasks?
"When the DMA is enabled, it needs about 2us per transaction to setup the linked list. When the master is transferring, it automatically read data from the linked list. If the DMA is not enabled, CPU has to write/read each byte to/from the FIFO by itself. Usually this is faster than 2us, but the transaction length is limited to 64 bytes for both write and read."
If my data transfer is less than 64 bytes, then DMA is actually worse than no-DMA, am I correct?
Thanks.