ESP32 Forum

Hi. In my project I need to keep the ESP32 pretty much awake all the time because I'm processing input from several sources, especially UART (from GPS and GSM modules). That means I cannot use even the light-sleep mode or I risk corrupting the data coming from those devices.

I come from other kinds of MCUs, the likes of LPCs, PICs and AVRs, and they usually have an "idle" mode where the CPU can be "not working" whilst all other peripherals retain the full functionality, reducing power consumption to 10% or less of the full working power. With FreeRTOS I usually insert a couple of instructions at vApplicationIdleHook() to enter this mode and then the core consumes much less current than just idling in a while() loop.

With ESP32-WROVER, having not one but two processors that use up energy, I'd like to know whether there are techniques or procedures I can look into to reduce current consumption. I plan to use esp-idf for framework. The ones I can think from the top of my head are:

• Turn off any peripherals that are not in use.
• Use modem-sleep (in fact, 99% of the time I don't need either WiFi or Bluetooth).
• Turn off any unnecessary pull-ups or pull-downs to avoid leakage.

My questions are:

• First of all, I'd like to know for sure if there's no ESP32 equivalent to the aforementioned Idle mode of other architectures.
• Will the ESP32 consume as much energy whether all FreeRTOS tasks are blocked (except prvIdleTask) compared to having tasks in stupid loops like for(;;){}?
• Is there any way to turn off one of the cores when there's no need for it? (e.g. PRO_CPU)
• Are there other techniques available for lowering CPU consumption I'm not aware off?

Thanks!

Guillermo

CPUs will enter "wait for interrupt" idle state from the Idle task (i.e. when there are no other tasks to run). This saves a few mA (when CPU frequency is 240MHz).

Turning off PRO CPU is not feasible because it is responsible for advancing the tick count in FreeRTOS. Turning off APP CPU dynamically is also not feasible because of the DPORT bug workaround (it requires some
occasional cross-CPU communication), however you may configure FreeRTOS to run in single core mode, in which case APP CPU will be clock gated.

However the main source of the power consumption in ESP32 (outside of light/deep sleep modes, and when WiFi is not receiving/transmitting) is the dynamic power used by buses and memory. Unfortunately, there is no method available to reduce that while running at full speed. You may enable Dynamic Frequency Scaling, which will result in lower average bus and CPU clocks, reducing power consumption. To keep listening to UARTs, enable 'use_ref_tick' in UART configuration, so that UARTs work at consistent baud rate when the bus frequency is changing. This method is also compatible with WiFi modem sleep.

See https://docs.espressif.com/projects/esp ... ement.html for more details.

Thank you for your answer.

CPUs will enter "wait for interrupt" idle state from the Idle task (i.e. when there are no other tasks to run). This saves a few mA (when CPU frequency is 240MHz).

Does this mean that if I lower the CPU frequency for normal operation (e.g. 80, 40, 20 MHz) the "wait for interrupt" state will become irrelevant regarding power consumption savings?

Power Management APIs don't allow you to lower the CPU frequency to <80MHz for normal operation. However when the CPUs go into idle state and all power management locks are released, the system can go to a lower 10/20/40MHz frequency. Wait-for-interrupt state of the CPU indeed doesn't contribute much to power savings, but it is still used.