Quickest possible digital output

[lesept]

Hello

I'm trying to build a system that can output as fast as possible some given bits to an ESP32 digital pin.
These bits are pseudo random, they can be generated earlier and stored in a memory (internal or external). The number of bits can range up to several thousands, if necessary it can be a power of two.

I've been told that one good solution would be to store the bits in an external flash memory and use an SPI bus to transfer them to the digital pin. So I have several questions before I begin to write the code.

• What highest bitrate can I achieve?
• Should I work in assembly code or will C be suited?
• Would this memory module or this one work? If not, any suggestion?
• I'm quite new to SPI and ESP32 so I would need some explanation and help on how to program my application.
  What best site / ebook should I begin to read (Kolban's, ESP32 TRM, other)?
• Can anyone explain the notion of Quad SPI? Is it basically a way of multiplying the speed by 4, and if yes how can I use it?
• What are the SPI related traps that I should be aware of for this application?

Thanks for you help.

[ESP_Angus]

Hi lesept,

If you just need to toggle a single pin with a particular sequence of timing then I'd suggest using the RMT peripheral:
https://docs.espressif.com/projects/esp ... s/rmt.html

It's designed for outputting pulse trains so you should be able to easily output a bit stream at a predefined rate. It's easier to set up and use than the SPI Master peripheral, and still does most of its work in the background so it doesn't occupy the CPU.

Maximum rate to twiddle a pin via RMT peripheral is 40MHz, I think.

[ESP_Sprite]

Alternately, the I2S peripheral can also be used to do this. If you need multiple parallel outputs, it has a parallel output mode that can control 24 pins at the same time.

[lesept]

Thanks for your answers.
Actually, seeing that the CPU frequency is 240 MHz, I'm expecting to reach at least 100 Mbit/s. But how?

One solution I think of is to use the QuadSPI (if exists) to get 4 bits per clock tick. The SPI frequency is 40MHz so I could potentially reach 160 Mbits/s. The ESP CPU would then seralize the bits.

If this is not possible, I'm thinking of using 2 SPI buses reading 2 memories, with different CPHA settings to have them stream their bits alternatively. This would be 80 MHz and I expect the CPU to reorder the bits and send them through the digital pin.

Another solution could be to use both CPUs, each with one SPI bus, sending their bits on two digital pins and reordering the bits out of the ESP32. This would also reach 80 MHz.

But maybe this is complete science fiction, I don't know. This is why I'm looking for advices before I begin anything...

[ESP_Angus]

Beyond a certain ceiling of CPU frequency, most microcontrollers run their external peripheral bus and peripherals at a lower clock to the main CPU. For ESP32, the APB peripheral bus speed is max 80MHz.

Quad SPI is named as such because it uses 4 pins to transfer data in parallel. So you can reach 160 Mbit/s with a 40MHz clock, but across 4 pins.

You can also do something similar (multiple pins) with the I2S peripheral option that Sprite mentioned.

Can you explain exactly what your goal is?

One thing to keep in mind is that high speed digital design (in the physical domain) is hard - even if you can wiggle a single pin at 100Mbit/s plus, getting this information into another device without signal integrity problems (ie random errors) requires some level of hardware engineering (or use of a different physical protocol to transfer the information).

[lesept]

I want to make a reflectometer to test cables.
The idea is to inject a pseudo random binary signal into the cable and read the reflected signal. The key point is to be able both to inject and acquire binary samples with the ESP32 at very high speed. In fact doing this at less than 100 MHz is not interesting.

There will be some additional electronic circuit interfacing to the cable, so this circuit can take care of any problem. As you see, this is not communication so signal integrity is not really needed. What is required is to be able to generate (at first, I'll study the reception side later) a very quick stream of bits from a digital pin.

I confess that I don't know much about the ESP32 which I only recently discovered. But the facts that the clock runs at 240MHz and that it is dual core makes it a very good candidate.

My idea is :

• step 1: generate the pseudorandom bits and store them in flash memory. This should not be too complex. For speed sake, should I use the flash on my EPS32 module or an external chip?
• step 2: as a loop, read the memory and output the bits to a digital pin as fast as possible. This is my concern at the moment. If I can't reach or do better than 100 Mbits/s then no need to go further.
• step 3: later. read and store in memory the reflected signal for processing.

Here are the ESP32 module that I have:

• WEMOS LOLIN32 Lite V1.0.0
• NodeMCU-32S

[ESP_Sprite]

Sorry, all useful peripherals for this are tied to the 80MHz APB bus speed. I highly doubt it's possible to get higher speeds than that with the ESP32 alone.

[Deouss]

You probably need external hf transmitter/receiver that can store digital data in some buffer and can be read with SPI or so by ESP