ESP32-S3 enabling GPIO39-GPIO42

[steaky1212]

Hi,

I am trying to use GPIO39-GPIO42 as IO (and SDIO) in a project, but I think they are still defined as JTAG pins and so I can't toggle them. I would still like to be able to JTAG through the USB interface. I would prefer to not rely on strapping GPIO3 high.

Looking in the datasheet, I think I have to burn the eFuse -> EFUSE_DIS_PAD_JTAG, however when I look in the esp_efuse_table.csv I can't find a reference to that fuse.

Clearly I'm missing something... any ideas?

Many thanks,
steaky

[ESP_Sprite]

You should simply be able to use these GPIOs in drivers etc as if they were any other GPIOs - the drivers will automatically disable the JTAG functionality if it was enabled. Is that not working for you?

[steaky1212]

Yes, this was absolutely my fault!!

One pin I was trying to enable a pull-up on is probably being held externally low by something else.
The others, I was calling using the pin number for the mask, not (1u<<pin_number).

Apologies

[Jonathan2892]

Hey,
I need GPIO39 (MTCK) floating after reset. Form the docs I understand that I need to burn EFUSE_DIS_PAD_JTAG = 1. This way I can use JTAG via USB and get the MTCK floating. But I can not burn this fuse, it is not even in the summary.

How can I burn this fuse or get the described behaviour? It is crucial for my application that GPIO39 is floating (I have an external pull-down resistor).

edit1: I am working with a esp32-s3-wroom-1u

Best,
Jonathan

[ESP_Sprite]

You would use espefuse.py for that, which is part of esp-idf.

[Jonathan2892]

I already did use espefuse.py.

Here are my logs:

"espefuse.py -p /dev/cu.usbmodem142401 summary":

Code: Select all

espefuse.py -p /dev/cu.usbmodem142401 summary                                                                                                                 
Connecting...
Detecting chip type... ESP32-S3
espefuse.py v3.3-dev

=== Run "summary" command ===
EFUSE_NAME (Block) Description  = [Meaningful Value] [Readable/Writeable] (Hex Value)
----------------------------------------------------------------------------------------
Config fuses:
DIS_ICACHE (BLOCK0)                                Disables ICache                                    = False R/W (0b0)
DIS_DCACHE (BLOCK0)                                Disables DCache                                    = False R/W (0b0)
DIS_DOWNLOAD_ICACHE (BLOCK0)                       Disables Icache when SoC is in Download mode       = False R/W (0b0)
DIS_DOWNLOAD_DCACHE (BLOCK0)                       Disables Dcache when SoC is in Download mode       = False R/W (0b0)
DIS_FORCE_DOWNLOAD (BLOCK0)                        Disables forcing chip into Download mode           = False R/W (0b0)
DIS_CAN (BLOCK0)                                   Disables the TWAI Controller hardware              = False R/W (0b0)
DIS_APP_CPU (BLOCK0)                               Disables APP CPU                                   = False R/W (0b0)
FLASH_TPUW (BLOCK0)                                Configures flash startup delay after SoC power-up, = 0 R/W (0x0)
                                                    unit is (ms/2). When the value is 15, delay is 7.
                                                   5 ms                                              
DIS_LEGACY_SPI_BOOT (BLOCK0)                       Disables Legacy SPI boot mode                      = False R/W (0b0)
UART_PRINT_CHANNEL (BLOCK0)                        Selects the default UART for printing boot msg     = UART0 R/W (0b0)
FLASH_ECC_MODE (BLOCK0)                            Configures the ECC mode for SPI flash             
   = 16-byte to 18-byte mode R/W (0b0)
DIS_USB_DOWNLOAD_MODE (BLOCK0)                     Disables USB OTG download feature in UART download = False R/W (0b0)
                                                    boot mode                                        
UART_PRINT_CONTROL (BLOCK0)                        Sets the default UART boot message output mode     = Enabled R/W (0b00)
FLASH_TYPE (BLOCK0)                                Selects SPI flash type                             = 4 data lines R/W (0b0)
FLASH_PAGE_SIZE (BLOCK0)                           Sets the size of flash page                        = 0 R/W (0b00)
FLASH_ECC_EN (BLOCK0)                              Enables ECC in Flash boot mode                     = False R/W (0b0)
FORCE_SEND_RESUME (BLOCK0)                         Forces ROM code to send an SPI flash resume comman = False R/W (0b0)
                                                   d during SPI boot                                 
BLOCK_USR_DATA (BLOCK3)                            User data                                         
   = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W 

Efuse fuses:
WR_DIS (BLOCK0)                                    Disables programming of individual eFuses          = 0 R/W (0x00000000)
RD_DIS (BLOCK0)                                    Disables software reading from BLOCK4-10           = 0 R/W (0b0000000)

Identity fuses:
SECURE_VERSION (BLOCK0)                            Secure version (used by ESP-IDF anti-rollback feat = 0 R/W (0x0000)
                                                   ure)                                              
MAC (BLOCK1)                                       Factory MAC Address                               
   = 7c:df:a1:ff:86:d8 (OK) R/W 
WAFER_VERSION (BLOCK1)                             WAFER version                                      = 1 R/W (0b001)
PKG_VERSION (BLOCK1)                               ??? Package version                                = ESP32-S3 R/W (0x0)
BLOCK1_VERSION (BLOCK1)                            ??? BLOCK1 efuse version                           = 1 R/W (0b001)
OPTIONAL_UNIQUE_ID (BLOCK2)                        ??? Optional unique 128-bit ID                    
   = c8 03 53 b6 c0 ca 30 8c b6 9d 0f 5a 98 25 7c 6b R/W 
BLOCK2_VERSION (BLOCK2)                            ??? Version of BLOCK2                              = 5 R/W (0b101)
CUSTOM_MAC (BLOCK3)                                Custom MAC Address                                
   = 00:00:00:00:00:00 (OK) R/W 

Security fuses:
SOFT_DIS_JTAG (BLOCK0)                             Software disables JTAG by programming odd number o = 0 R/W (0b000)
                                                   f 1 bit(s). JTAG can be re-enabled via HMAC periph
                                                   eral                                              
HARD_DIS_JTAG (BLOCK0)                             Hardware disables JTAG permanently                 = False R/W (0b0)
DIS_DOWNLOAD_MANUAL_ENCRYPT (BLOCK0)               Disables flash encryption when in download boot mo = False R/W (0b0)
                                                   des                                               
SPI_BOOT_CRYPT_CNT (BLOCK0)                        Enables encryption and decryption, when an SPI boo = Disable R/W (0b000)
                                                   t mode is set. Enabled when 1 or 3 bits are set,di
                                                   sabled otherwise                                  
SECURE_BOOT_KEY_REVOKE0 (BLOCK0)                   Revokes use of secure boot key digest 0            = False R/W (0b0)
SECURE_BOOT_KEY_REVOKE1 (BLOCK0)                   Revokes use of secure boot key digest 1            = False R/W (0b0)
SECURE_BOOT_KEY_REVOKE2 (BLOCK0)                   Revokes use of secure boot key digest 2            = False R/W (0b0)
KEY_PURPOSE_0 (BLOCK0)                             KEY0 purpose                                       = USER R/W (0x0)
KEY_PURPOSE_1 (BLOCK0)                             KEY1 purpose                                       = USER R/W (0x0)
KEY_PURPOSE_2 (BLOCK0)                             KEY2 purpose                                       = USER R/W (0x0)
KEY_PURPOSE_3 (BLOCK0)                             KEY3 purpose                                       = USER R/W (0x0)
KEY_PURPOSE_4 (BLOCK0)                             KEY4 purpose                                       = USER R/W (0x0)
KEY_PURPOSE_5 (BLOCK0)                             KEY5 purpose                                       = USER R/W (0x0)
SECURE_BOOT_EN (BLOCK0)                            Enables secure boot                                = False R/W (0b0)
SECURE_BOOT_AGGRESSIVE_REVOKE (BLOCK0)             Enables aggressive secure boot key revocation mode = False R/W (0b0)
STRAP_JTAG_SEL (BLOCK0)                            Enable selection between usb_to_jtagor pad_to_jtag = True R/W (0b1)
                                                    through GPIO3                                    
DIS_DOWNLOAD_MODE (BLOCK0)                         Disables all Download boot modes                   = False R/W (0b0)
ENABLE_SECURITY_DOWNLOAD (BLOCK0)                  Enables secure UART download mode (read/write flas = False R/W (0b0)
                                                   h only)                                           
BLOCK_KEY0 (BLOCK4)
  Purpose: USER
               Encryption key0 or user data                      
   = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W 
BLOCK_KEY1 (BLOCK5)
  Purpose: USER
               Encryption key1 or user data                      
   = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W 
BLOCK_KEY2 (BLOCK6)
  Purpose: USER
               Encryption key2 or user data                      
   = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W 
BLOCK_KEY3 (BLOCK7)
  Purpose: USER
               Encryption key3 or user data                      
   = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W 
BLOCK_KEY4 (BLOCK8)
  Purpose: USER
               Encryption key4 or user data                      
   = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W 
BLOCK_KEY5 (BLOCK9)
  Purpose: USER
               Encryption key5 or user data                      
   = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W 
BLOCK_SYS_DATA2 (BLOCK10)                          System data (part 2)                              
   = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W 

Spi_Pad_Config fuses:
SPI_PAD_CONFIG_CLK (BLOCK1)                        SPI CLK pad                                        = 0 R/W (0b000000)
SPI_PAD_CONFIG_Q (BLOCK1)                          SPI Q (D1) pad                                     = 0 R/W (0b000000)
SPI_PAD_CONFIG_D (BLOCK1)                          SPI D (D0) pad                                     = 0 R/W (0b000000)
SPI_PAD_CONFIG_CS (BLOCK1)                         SPI CS pad                                         = 0 R/W (0b000000)
SPI_PAD_CONFIG_HD (BLOCK1)                         SPI HD (D3) pad                                    = 0 R/W (0b000000)
SPI_PAD_CONFIG_WP (BLOCK1)                         SPI WP (D2) pad                                    = 0 R/W (0b000000)
SPI_PAD_CONFIG_DQS (BLOCK1)                        SPI DQS pad                                        = 0 R/W (0b000000)
SPI_PAD_CONFIG_D4 (BLOCK1)                         SPI D4 pad                                         = 0 R/W (0b000000)
SPI_PAD_CONFIG_D5 (BLOCK1)                         SPI D5 pad                                         = 0 R/W (0b000000)
SPI_PAD_CONFIG_D6 (BLOCK1)                         SPI D6 pad                                         = 0 R/W (0b000000)
SPI_PAD_CONFIG_D7 (BLOCK1)                         SPI D7 pad                                         = 0 R/W (0b000000)

Usb Config fuses:
DIS_USB (BLOCK0)                                   Disables the USB OTG hardware                      = False R/W (0b0)
USB_EXCHG_PINS (BLOCK0)                            Exchanges USB D+ and D- pins                       = False R/W (0b0)
EXT_PHY_ENABLE (BLOCK0)                            Enables external USB PHY                           = False R/W (0b0)
BTLC_GPIO_ENABLE (BLOCK0)                          Enables BTLC GPIO                                  = 0 R/W (0b00)
DIS_USB_JTAG (BLOCK0)                              Disable usb_serial_jtag-to-jtag function           = False R/W (0b0)
DIS_USB_SERIAL_JTAG (BLOCK0)                       Disable usb_serial_jtag module                     = False R/W (0b0)
USB_PHY_SEL (BLOCK0)                               Select internal/external PHY for USB OTGand usb_se = False R/W (0b0)
                                                   rial_jtag                                         

Vdd_Spi Config fuses:
VDD_SPI_XPD (BLOCK0)                               The VDD_SPI regulator is powered on                = True R/W (0b1)
VDD_SPI_TIEH (BLOCK0)                              The VDD_SPI power supply voltage at reset         
   = Connect to VDD_RTC_IO R/W (0b1)
VDD_SPI_FORCE (BLOCK0)                             Force using VDD_SPI_XPD and VDD_SPI_TIEH to config = True R/W (0b1)
                                                   ure VDD_SPI LDO                                   
PIN_POWER_SELECTION (BLOCK0)                       Sets default power supply for GPIO33..37           = VDD_SPI R/W (0b1)

Wdt Config fuses:
WDT_DELAY_SEL (BLOCK0)                             Selects RTC WDT timeout threshold at startup       = 0 R/W (0b00)

Flash voltage (VDD_SPI) set to 3.3V by efuse.

"espefuse.py --port /dev/cu.usbmodem142401 burn_efuse EFUSE_DIS_PAD_JTAG 1":

Code: Select all

▶ espefuse.py --port /dev/cu.usbmodem142401 burn_efuse EFUSE_DIS_PAD_JTAG 1                                                                                     
Connecting...
Detecting chip type... ESP32-S3
espefuse.py v3.3-dev

A fatal error occurred: Invalid the efuse name 'EFUSE_DIS_PAD_JTAG'. Available the efuse names: ['WR_DIS', 'RD_DIS', 'DIS_ICACHE', 'DIS_DCACHE', 'DIS_DOWNLOAD_ICACHE', 'DIS_DOWNLOAD_DCACHE', 'DIS_FORCE_DOWNLOAD', 'DIS_USB', 'DIS_CAN', 'DIS_APP_CPU', 'SOFT_DIS_JTAG', 'HARD_DIS_JTAG', 'DIS_DOWNLOAD_MANUAL_ENCRYPT', 'USB_EXCHG_PINS', 'EXT_PHY_ENABLE', 'BTLC_GPIO_ENABLE', 'VDD_SPI_XPD', 'VDD_SPI_TIEH', 'VDD_SPI_FORCE', 'WDT_DELAY_SEL', 'SPI_BOOT_CRYPT_CNT', 'SECURE_BOOT_KEY_REVOKE0', 'SECURE_BOOT_KEY_REVOKE1', 'SECURE_BOOT_KEY_REVOKE2', 'KEY_PURPOSE_0', 'KEY_PURPOSE_1', 'KEY_PURPOSE_2', 'KEY_PURPOSE_3', 'KEY_PURPOSE_4', 'KEY_PURPOSE_5', 'SECURE_BOOT_EN', 'SECURE_BOOT_AGGRESSIVE_REVOKE', 'DIS_USB_JTAG', 'DIS_USB_SERIAL_JTAG', 'STRAP_JTAG_SEL', 'USB_PHY_SEL', 'FLASH_TPUW', 'DIS_DOWNLOAD_MODE', 'DIS_LEGACY_SPI_BOOT', 'UART_PRINT_CHANNEL', 'FLASH_ECC_MODE', 'DIS_USB_DOWNLOAD_MODE', 'ENABLE_SECURITY_DOWNLOAD', 'UART_PRINT_CONTROL', 'PIN_POWER_SELECTION', 'FLASH_TYPE', 'FLASH_PAGE_SIZE', 'FLASH_ECC_EN', 'FORCE_SEND_RESUME', 'SECURE_VERSION', 'MAC', 'SPI_PAD_CONFIG_CLK', 'SPI_PAD_CONFIG_Q', 'SPI_PAD_CONFIG_D', 'SPI_PAD_CONFIG_CS', 'SPI_PAD_CONFIG_HD', 'SPI_PAD_CONFIG_WP', 'SPI_PAD_CONFIG_DQS', 'SPI_PAD_CONFIG_D4', 'SPI_PAD_CONFIG_D5', 'SPI_PAD_CONFIG_D6', 'SPI_PAD_CONFIG_D7', 'WAFER_VERSION', 'PKG_VERSION', 'BLOCK1_VERSION', 'OPTIONAL_UNIQUE_ID', 'BLOCK2_VERSION', 'CUSTOM_MAC', 'BLOCK_USR_DATA', 'BLOCK_KEY0', 'BLOCK_KEY1', 'BLOCK_KEY2', 'BLOCK_KEY3', 'BLOCK_KEY4', 'BLOCK_KEY5', 'BLOCK_SYS_DATA2']

[Jonathan2892]

Any news here?

[slare09]

Hi all,

I'm stuck on the same issue. Flashed the efuses (USB_PHY_SEL, DIS_USB_JTAG, DIS_PAD_JTAG) and afterwards I am not able to use GPIO41 as an output (which I was able to do before).

Any ideas?

Some observations:

• When connected to a 1M resistor to ground, the measured voltage over the resistor is zero.

• When I remove this resistor and leave GPIO41 unconnected, I'm measuring a voltage of 1.8V over GPIO41 and ground

This seems like the behaviour of a floating pin.